PCB Schematic Draft

flux

U1 is now a 6-pin placeholder with no assumed pinout. I’m updating the part notes so the uncertainties stay visible instead of encoded as guessed values.

flux

Applied the microscope-inventory corrections: U1 is now a 6-pin placeholder, R6/C1-C3/D1-D3 are annotated as uncertain, and possible R5 is documented as a note only.
Open items:
  • U1 pins are intentionally floating until trace mapping confirms pinout.
  • R6, R7, C1-C3, D1-D3 type/polarity, and possible R5 still need measurement/confirmation.
  • ERC still reports expected unresolved placeholder pins and missing MPNs for generic draft parts.
Updated files: Schematic Capture Notes and Project Specification.
Suggested next steps:
  1. Measure R6/R7 and C1-C3.
  2. Confirm D1-D3 with diode/LED test mode.
  3. Provide U1/U2 continuity maps so I can wire the placeholders correctly.
Clean notes and review
Arrange schematic groups
Create measurement checklist
Add photo map plan
Check BOM placeholders

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Project Specification — NSS-Bridge-3
Project Overview
Status: Draft / reverse-engineering capture.
NSS-Bridge-3 is a schematic reconstruction of an existing small wearable, coin-cell-powered auricular peripheral nerve-field stimulator / TENS-class PCB. The goal is to reproduce the observed board architecture as closely as possible from supplied notes, while keeping unknown IC identities, pinouts, values, and safety limits explicit.
Intended Use
This project is for reverse-engineering analysis and prototype documentation only. It is not validated for therapeutic, diagnostic, clinical, animal, or human use.
What the Device Should Do
  • Operate from a coin cell battery input on net VBAT.
  • Generate a boosted stimulation rail VSTIM using U2, L1, and support passives.
  • Feed three electrode output pads E1-E3 through current-limiting/steering parts.
  • Provide a separate exposed return ring contact on net RING.
  • Preserve the original designators and visible component classes where exact MPNs are unknown.
Main Features
  • Small wearable board, approximately 35 mm x 15 mm.
  • Two-layer PCB target, 1.0 mm thick.
  • Organic rounded outline expected in layout stage.
  • Logic and power electronics on top side.
  • Micro-USB-B receptacle, coin-cell spring clip, and exposed ring return electrode on bottom side.
System Architecture
Diagram



  
    
  
  
    
  





























Coin Cell B1
VBAT rail
U1 6-pin small IC, marking T18 AU8 node_2DZ
U2 boost driver placeholder, marking LBVC B041
10uH boost inductor
VSTIM stimulation rail
R3 43 ohm
R4 43 ohm
D1 confirm diode vs LED
D2 confirm diode vs LED
D3 confirm diode vs LED
E1 electrode pad
E2 electrode pad
E3 electrode pad
RING return electrode
Hardware Subsystems
Power Input
  • B1 coin-cell spring clip supplies VBAT.
  • GND is common circuit reference.
  • J1 micro-USB-B shell and GND are tied to GND; VBUS/D+/D-/ID are marked no-connect until physical trace evidence says otherwise.
Timing / Control
  • U1 is represented by a 6-pin small-IC placeholder because microscope inventory corrected the package to 6 pins.
  • U1 marking is T18 AU8 2DZ; exact identity and pinout are unknown.
  • No U1 power/ground/function pins should be assumed until trace mapping confirms them.
  • R1 marked 700 is interpreted as 70 ohm pending measurement.
  • R2 marked 310 is interpreted as 31 ohm pending measurement.
Boost Stimulation Rail
  • U2 is represented by an 8-pin controller placeholder because original marking LBVC B041 has not been identified.
  • L1 is 10uH, shielded, 3 mm x 3 mm class.
  • VSTIM currently connects L1, U2 OUT placeholder, C3, R3, R4, and R6.
  • R6/R7 form a placeholder feedback/bias network on FB_DIV; R6 marking may be 103 (10kΩ) or 105 (1MΩ), and R7 value is still unknown.
Electrode Outputs
  • R3 and R4 are 43 ohm 0402 resistors.
  • D1-D3 are output-network two-terminal parts that may be LEDs rather than rectifier/signal diodes; confirm type and polarity.
  • E1-E3 are plated through-hole electrode pads.
  • RING is the return electrode net and should become an exposed gold ring contact with stitching vias during layout.
Interfaces and Connections

Table

InterfaceCurrent schematic treatmentOpen items
B1 coin cellPOS to VBAT, NEG to GNDConfirm battery diameter/holder geometry
J1 micro-USB-BShell/GND to GND; VBUS/D+/D-/ID NCConfirm whether USB is mechanical only, charge/programming, or power input
E1-E3STIM_OUT1, STIM_OUT2, STIM_OUT3Confirm diode-vs-LED type, polarity, and routing from photos/continuity
RINGDedicated RING netDefine exact ring geometry and via stitching in layout
Power and Runtime Expectations
  • Power source: coin cell only per supplied brief.
  • Runtime, battery type, pulse profile, and peak stimulation current are unknown.
  • Coin-cell internal resistance and pulse loading must be characterized before treating boost behavior as valid.
Power Tree and Power Budget

Table

RailSourceLoadsStatus
VBATB1 coin cellU2, L1 input, C1/C2, U1 after pinout confirmationCaptured, current unknown
VSTIMBoost stage U2/L1R3/R4 output paths, feedback/bias network, C3Captured as placeholder, voltage/current unknown
GNDB1 NEGU2 returns, passives, J1 shell/GND, U1 after pinout confirmationCaptured
RINGExposed return electrodeHuman/electrode return pathCaptured as separate electrode net
Manufacturing and Assembly Expectations
  • SMD/default compact construction.
  • Resistors and capacitors use 0402 generic footprints.
  • L1 uses a 3 mm x 3 mm class SMD inductor footprint placeholder.
  • Exact MPNs remain open for most passives and mechanical/electrode contacts.
Firmware-Relevant Hardware Requirements
  • Firmware/control behavior is unknown.
  • U1 may be a timing/control IC or custom-marked device; do not assume microcontroller behavior until identified.
  • Stimulation waveform, duty cycle, pulse width, charge balancing, and fault behavior must be measured on hardware.
Physical Design Expectations
  • Board size target: about 35 mm x 15 mm.
  • Organic rounded board outline.
  • Two layers, 1.0 mm thickness.
  • Top side: U1, U2, passives, inductor, output-network two-terminal parts.
  • Bottom side: J1, B1, and exposed ring contact.
Important Design Decisions
  • Used exact supplied designators for the observed BOM.
  • Updated U1 from a 10-pin placeholder to a 6-pin placeholder per microscope inventory correction.
  • Used generic/library placeholders rather than inventing unverified IC identities.
  • Preserved ambiguity on unknown U1/U2 pins instead of hiding it with no-connects.
  • Did not add R5 as a part; only noted possible R5 silkscreen as an open question.
  • Created named nets matching the brief: VBAT, GND, VSTIM, STIM_OUT1, STIM_OUT2, STIM_OUT3, RING.
Assumptions and Open Questions
  • U1 is a 6-pin small IC marked T18 AU8 2DZ; exact identity and pinout are unknown.
  • R1 code 700 is 70 ohm; verify by measurement.
  • R2 code 310 is 31 ohm; verify by measurement.
  • R6 marking is ambiguous between 103 (10kΩ) and 105 (1MΩ); verify by measurement.
  • R7 value is unknown.
  • C1-C3 values are unmeasured; do not assume values until measured.
  • D1-D3 may be LEDs rather than rectifier/signal diodes; confirm type and polarity.
  • Possible R5 silkscreen exists; do not add the part until confirmed.
  • U1/U2 placeholder pin names do not represent the original ICs.
  • J1 USB data/VBUS are not connected because the brief did not define their nets.
Change Notes
  • Initial schematic capture created from pasted reverse-engineering brief.
  • Project renamed to NSS-Bridge-3.
  • Primary power, boost, electrode, and return nets created.
  • Safety documentation started because this is an electrical stimulation device intended to interface with the body.
  • Microscope inventory corrections applied: U1 changed to 6-pin placeholder; R6/C1-C3/D1-D3/R5 uncertainties recorded visibly.

  • Project Overview

  • Intended Use

  • What the Device Should Do

  • Main Features

  • System Architecture

  • Hardware Subsystems

  • Power Input

  • Timing / Control

  • Boost Stimulation Rail

  • Electrode Outputs

  • Interfaces and Connections

  • Power and Runtime Expectations

  • Power Tree and Power Budget

  • Manufacturing and Assembly Expectations

  • Firmware-Relevant Hardware Requirements

  • Physical Design Expectations

  • Important Design Decisions

  • Assumptions and Open Questions

  • Change Notes

NSS-Bridge-3

NSS-Bridge-3 thumbnail
Wearable coin-cell peripheral nerve-field stimulator reverse-engineering schematic with boost stimulation rail, micro-USB, electrode outputs, and bottom return ring contact.

Properties

Medical

Battery

Wearable

Pricing & Availability

Distributor

Qty 1

Arrow

$1.38–$2.29

Digi-Key

$0.61–$4.92

HQonline

$0.08

LCSC

$0.63

Mouser

$2.59

TME

$0.60

Verical

$0.14–$1.33

Controls