CameraPen Project Specification

I applied the targeted cleanup without touching the main routed trace set: disabled/shrunk U6 dummy mount pads, disabled DRC-listed via/fill/stitch artifacts, and added RF launch width/0.5 mm keepout rules around the LNA/antenna feed.
DRC is still not clean: the checker continues to report the same 42 overlap items, which indicates these are generated footprint/route artifacts that are not being removed by normal layout-rule overrides; the RF route also cannot be manually completed because the matching-network pad net metadata is inconsistent (U6:LNA_IN on RF_ESP32_FEED, ANT1:1 on RF_ANT_FEED, and C15 pad appears empty to the router).
Next best fix is schematic/layout net cleanup for the RF pi-match chain, then regenerate the U6 footprint without the dummy mount pads instead of trying to suppress them in layout.
I executed the RF net metadata fix: merged the ESP32 RF feed and antenna-side feed into a single RF_ANT_FEED net, then successfully routed U6:LNA_IN → ANT1:1.
DRC is still not clean: after refresh it reports 7 airwires and 45 overlap errors; the remaining overlaps are still generated via/through-hole/U6 dummy-pad artifacts that normal layout overrides are not clearing. Also note the RF route was completed but is not final RF-quality yet because the router used a long multi-layer path with vias; the next real fix is to regenerate/replace the U6 footprint and RF matching layout, not keep suppressing generated artifacts.
Rebuild RF and U6
Regenerate U6 footprint
Rebuild RF layout
Fix J3 artifacts
Update review notes
U6
U3
C7
Capacitance
1uF
J1 EH - U2 V_{SS}
C12 P2 - C13 P2
C12 P2 - C13 P2
U1 GND - R1 P2
C12
Capacitance
100nF
U1 GND - R1 P2
C11
Capacitance
100nF
C12 P2 - C13 P2
J1 EH - U2 V_{SS}
J1 EH - U2 V_{SS}
C15
Capacitance
DNI F
J1 EH - U2 V_{SS}
C1
Capacitance
4.7uF
C4
Capacitance
4.7uF
GND
GND
TP_CHG_N P1 - TP_SEC_N P1
U4 VSS - U5 GND
J1 EH - U2 V_{SS}
U6 GND - C9 P2
C6
Capacitance
1uF
C10
Capacitance
100nF
U4 VSS - U5 GND
GND
U6 GND - C9 P2
U6 GND - C9 P2
U4 VSS - U5 GND
U4 VSS - U5 GND
C12 P2 - C13 P2
U4 VSS - U5 GND
C12 P2 - C13 P2
C16
Capacitance
DNI F
C2
Capacitance
4.7uF
C13
Capacitance
10pF
C9
Capacitance
10µF
C12 P2 - C13 P2
U1 GND - R1 P2
U4 VSS - U5 GND
U4 VSS - U5 GND
C12 P2 - C13 P2
U4 VSS - U5 GND
C3
Capacitance
1uF
J1 EH - U2 V_{SS}
U6 GND - C9 P2
C14
Capacitance
10pF
U4 VSS - U5 GND
C8
Capacitance
1uF
C5
Capacitance
1uF
U4 VSS - U5 GND
TP_CHG_N P1 - TP_SEC_N P1
C12 P2 - C13 P2
J1 EH - U2 V_{SS}
U2 V_{BAT} - J2 1
CAM_RESET
U6 VDD_SPI - C9 P1
CAM_D2
U6 GPIO8 - R8 P2
U6 GPIO9 - R9 P2
R10 P2 - C12 P1
U6 VDD3P3_RTC - U6 VDD3P3_CPU
U6 VDD_SPI - C9 P1
U5 VOUT - C8 P1
U6 U0RXD - TP_RXD P1
U3 EN - C2 P1
U6 VDD_SPI - C9 P1
U3 EN - C2 P1
U6 GPIO9 - R9 P2
CAM_D0
CAM_D5
J1 VBUS - U2 V_{DD}
U2 V_{BAT} - J2 1
U5 VOUT - C8 P1
CAM_D1
R5 P2 - R6 P1
R4 P2 - SW1 1
U6 LNA_IN - L1 P1
CAM_D3
CAM_MCLK
CAM_D6
U2 V_{BAT} - J2 1
U6 VDD3P3_RTC - U6 VDD3P3_CPU
U2 PROG - R1 P1
U6 XTAL_N - Y1 P3
CAM_D6
CAM_VSYNC
U6 LNA_IN - L1 P1
R4 P2 - SW1 1
U6 VDD3P3 - U6 VDD3P3
U3 EN - C2 P1
CAM_RESET
J1 VBUS - U2 V_{DD}
U4 VOUT - C6 P1
CAM_D7
U6 VDD3P3 - U6 VDD3P3
U4 VOUT - C6 P1
U2 V_{BAT} - J2 1
U5 VOUT - C8 P1
U6 VDD_SPI - C9 P1
U6 LNA_IN - L1 P1
U6 U0TXD - TP_TXD P1
CAM_PCLK
U6 U0TXD - TP_TXD P1
U6 VDD_SPI - C9 P1
CAM_PWDN
R5 P2 - R6 P1
U6 VDD3P3_RTC - U6 VDD3P3_CPU
U2 V_{BAT} - J2 1
U2 V_{BAT} - J2 1
R5 P2 - R6 P1
J1 VBUS - U2 V_{DD}
R10 P2 - C12 P1
U6 VDD3P3_RTC - U6 VDD3P3_CPU
R4 P2 - SW1 1
R4 P2 - SW1 1
R10 P2 - C12 P1
U6 U0RXD - TP_RXD P1
U6 XTAL_N - Y1 P3
U6 VDD_SPI - C9 P1
CAM_D1
U6 LNA_IN - L1 P1
CAM_D5
U6 XTAL_P - Y1 P1
U4 VOUT - C6 P1
CAM_D7
U2 PROG - R1 P1
U6 LNA_IN - L1 P1
CAM_D4
U6 GPIO8 - R8 P2
U4 CE - C5 P1
U6 VDD_SPI - C9 P1
CAM_PCLK
U4 CE - C5 P1
U5 VOUT - C8 P1
CAM_D0
CAM_PWDN
U6 VDD_SPI - C9 P1
U6 GPIO8 - R8 P2
CAM_MCLK
CAM_HREF
U6 GPIO9 - R9 P2
CAM_D2
U6 XTAL_N - Y1 P3
U6 VDD_SPI - C9 P1
U6 LNA_IN - L1 P1
CAM_D4
R10 P2 - C12 P1
U6 XTAL_P - Y1 P1
U4 CE - C5 P1
CAM_VSYNC
U6 VDD_SPI - C9 P1
CAM_HREF
CAM_D3
U6 VDD_SPI - C9 P1
U6 XTAL_P - Y1 P1
J2
TP_TXD
R10
Resistance
10kΩ
R8
Resistance
4.7kΩ
TP_BOOT
R6
Resistance
100kΩ
TP_CHG_N
TP_SEC_P
R5
Resistance
25.5kΩ
TP_CHG_P
U5
TP_3V3
ANT1
R9
Resistance
4.7kΩ
SW1
TP_EN
R4
Resistance
10kΩ
U4
R1
Resistance
10kΩ
L1
Inductance
0nH/DNI tune H
TP_GND
U2
J3
TP_RXD
TP_SEC_N
Y1

Refine this doc
Ask about this doc
CameraPen Design Notes
Current Architecture Direction
CameraPen is now a three-PCB miniature camera system inside a two-section pen body:
Battery → Charging PCB → Camera PCB → OV3660 → Main PCB ESP32-S3R8 → Button
Final product direction:
  • No USB-C connector on the final pen body.
  • Charging through external dock contacts using pogo pins and exposed copper pads.
  • Bare OV3660 camera module connected by 24-pin FPC/FFC.
  • Custom narrow ESP32-S3R8 bare-QFN main PCB instead of ESP32-CAM module.
Mechanical Allocation
Total Assembly
  • Fully assembled pen length: 138 mm.
Section ① — Battery + Charging
  • Battery length allocation: 55 mm.
  • Charging PCB allocation: 12 mm.
  • Total Section ① electronics allocation: 67 mm.
  • Thread-side inner diameter: about 8 mm.
Section ② — Camera + Main PCB + Button
  • Nominal section length: 83 mm.
  • Effective usable length after overlap/thread allowance: about 71 mm.
  • Inner diameter/channel: about 9 mm.
  • Placement order: Camera PCB → OV3660 → Main PCB → Button.
PCB Split
  1. Charging PCB
    • Battery charging and power entry.
    • Must fit in the 12 mm allocation.
    • Uses exposed copper charging contacts for the final charging interface.
    • External charger/dock should provide pogo pins, not a USB-C plug on the pen.
  2. Camera PCB
    • Carries the 24-pin OV3660 FFC/FPC connector.
    • Provides local camera rail decoupling and possibly camera LDO/filter placement depending on final layout.
    • Needs careful orientation control for J3.
  3. Main PCB
    • Carries ESP32-S3R8 bare QFN, support passives, RF/crystal circuitry, programming access, and button.
    • Must fit within the remaining length and 9 mm internal diameter.
ESP32-S3R8 Custom Controller Update
The oversized ESP32-CAM module was removed and replaced by U6 ESP32-S3R8.
Added support components:
  • R7 10 kΩ pull-up for ESP_EN / CHIP_PU.
  • R8 4.7 kΩ pull-up for CAM_SIOD.
  • R9 4.7 kΩ pull-up for CAM_SIOC.
  • C9 10 µF bulk/local 3V3 decoupling.
  • C10 100 nF 3V3 decoupling.
  • C11 100 nF VDDA/RF-side decoupling.
Power connections:
  • ESP32-S3R8 VDD3P3, VDD3P3_RTC, VDD3P3_CPU, VDDA, and VDD_SPI are tied to 3V3 in the current schematic.
  • ESP32-S3R8 exposed pad / GND is tied to GND.
Camera GPIO mapping:

Table


Camera NetESP32-S3R8 GPIO
CAM_D0GPIO4
CAM_D1GPIO5
CAM_D2GPIO6
CAM_D3GPIO7
CAM_D4GPIO14
CAM_D5GPIO17
CAM_D6GPIO18
CAM_D7GPIO21
CAM_PCLKGPIO11
CAM_VSYNCGPIO12
CAM_HREFGPIO13
CAM_MCLKGPIO10
CAM_SIODGPIO8
CAM_SIOCGPIO9
CAM_RESETGPIO33
CAM_PWDNGPIO34
BUTTON / bootGPIO0
Important remaining hardware items before production:
  • Add ESP32-S3 40 MHz crystal network on XTAL_P/XTAL_N using Espressif reference values.
  • Add RF antenna and matching network from LNA_IN; this is mandatory for Wi-Fi/BLE performance and compliance.
  • Add programming/UART pads for U0TXD, U0RXD, EN, GPIO0, 3V3, and GND.
  • Verify whether any embedded flash/PSRAM SPI pins must be left per Espressif reference design or connected/strapped for the selected ESP32-S3R8 variant.
  • Confirm boot strap requirements for GPIO0/GPIO45/GPIO46.
Charging Interface Decision
USB-C is too large for the final pen body. The final charging concept is:
  • Pen side: exposed copper pads on the Charging PCB.
  • Charger/dock side: spring-loaded gold-plated pogo pins.
  • Current DRC-safe layout implementation:
    • TP_CHG_P: circular positive pad, about 1.6 mm diameter.
    • TP_CHG_N: large rounded-rectangle ground/dock-alignment pad, about 1.4 mm × 4.6 mm.
  • A true same-center concentric pad/ring was attempted, but Flux reported overlapping copper because the current testpoint primitive cannot represent an isolated annular ground ring with an independent center positive island. If true concentric charging remains mandatory, create/import a custom annular-contact footprint and verify the exported Gerbers before fabrication.
Electrical requirements:
  • Polarity-safe contact geometry or mechanical keying.
  • Short-circuit protection/current limiting on charger output.
  • ESD/contact protection if contacts are exposed.
  • Clear test points for VBAT/GND/charge input during bring-up.
OV3660 / J3 Pin Mapping
J3 schematic pin numbering follows the IADIY-style OV3660 24-pin DVP pinout:

Table


J3 PinNet / Function
1NC
2GND / AGND
3CAM_SIOD
4CAM_2V8 / AVDD
5CAM_SIOC
6CAM_RESET
7CAM_VSYNC
8CAM_PWDN
9CAM_HREF
10CAM_1V5 / DVDD
11CAM_2V8 / DOVDD
12CAM_D7
13CAM_MCLK
14CAM_D6
15GND / DGND
16CAM_D5
17CAM_PCLK
18CAM_D4
19CAM_D0
20CAM_D3
21CAM_D1
22CAM_D2
23NC
24NC
J3 Orientation Notes
  • Molex 505110-2491 is a right-angle SMT FFC/FPC connector with bottom-contact terminals.
  • The IADIY OV3660 drawing indicates the FPC tail view with pin 24 on the left and pin 1 on the right.
  • Because J3 is bottom-contact, the FPC contact-side view may be mirrored relative to the PCB top-view footprint.
  • Before layout release and before power-up, verify with the actual camera module:
    1. Which side of the FPC tail has exposed contacts.
    2. Which side has the stiffener.
    3. Whether contacts face down toward the PCB when inserted into J3.
    4. Which physical side of the inserted cable is camera pin 1.
    5. Continuity from camera FPC pin 2/15 to board GND, pin 4/11 to CAM_2V8, and pin 10 to CAM_1V5.
Values to Revisit After Final Part Selection
  • Battery capacity and physical cell diameter/length for the 55 mm space.
  • Exact Charging PCB charging topology and contact protection.
  • Charge current set by R1; current initial value is 10 kΩ for a conservative small-cell charge current.
  • U5 TPS76301 feedback divider values for exact 1.5 V output.
  • ESP32-S3R8 RF/crystal/programming details from Espressif reference design.
  • Final mechanical routing for OV3660 FPC because the FPC width is larger than the 9 mm barrel ID if routed straight.
  • Current Architecture Direction

  • Mechanical Allocation

  • Total Assembly

  • Section ① — Battery + Charging

  • Section ② — Camera + Main PCB + Button

  • PCB Split

  • ESP32-S3R8 Custom Controller Update

  • Charging Interface Decision

  • OV3660 / J3 Pin Mapping

  • J3 Orientation Notes

  • Values to Revisit After Final Part Selection

Assets

Assets are files uploaded to this project which can be used in various ways.

CameraPen thumbnail
Welcome to your new project. Imagine what you can build here.

Properties

Properties describe core aspects of the project.

Pricing & Availability

Distributor

Qty 1

Arrow

$0.37–$0.59

Digi-Key

$2.43

HQonline

$3.54–$3.58

LCSC

$4.31

Mouser

$4.59

TME

$1.58

Verical

$0.69–$0.79

Controls