Smart Chair Hardware Design Discussion

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Ergonix Smart Chair V1 — Hardware Design Description
  1. Overview
  • Product: Ergonix Smart Chair V1 – smart seat module for occupancy, posture, and pressure distribution.
  • Board: 2-layer target, 80 mm × 60 mm, USB‑C powered (5 V only), 3.3 V logic.
  • Architecture: ESP32‑C3 module + I2C IMU + 4× FSR analog inputs + USB‑C power and ESD + JST‑PH harness connectors + LEDs, reset, and programming pads.
  • Project stage: Pre‑prototype to Pilot (50–100 units); sourcing through LCSC for JLCPCB assembly.
  1. MVP functions
  • Occupancy detection: FSR-based presence and basic thresholding.
  • Sitting duration tracking: Periodic BLE updates to the app.
  • Basic pressure mapping: 4 zones (front-left, front-right, back-left, back-right).
  • Posture/tilt detection: IMU tilt channels (pitch/roll/yaw as needed).
  • BLE connectivity: BLE link to the mobile app at 1 Hz for sensor data.
  1. Major hardware blocks
  • MCU module: U1 ESP32‑C3‑WROOM‑02‑N4 (primary), fallback U2 ESP32‑C3‑WROOM‑02U‑N4 for external antenna option.
  • IMU: U3 MPU‑6050 over I2C.
  • Power input and protection:
    • USB‑C receptacle: J1.
    • Data‑line ESD: D1 (protects D+/D− at the connector; data not used in V1).
    • VBUS TVS: D4 clamps input surges.
    • CC sink resistors: R19 (CC1→GND), R20 (CC2→GND).
    • 3.3 V LDO: U4 NCP176BMX330TCG with local decoupling C1–C4.
  • Sensor interfaces:
    • FSR harness: J2 JST‑PH 6‑pin (4× FSR + VCC + GND).
    • I2C/power harness: J3 JST‑PH 4‑pin (SDA, SCL, VCC, GND).
  • User interface and debug:
  • Grounds and return: GND single reference plane with short ESD return paths near the USB‑C connector.
  1. Power and USB‑C (power‑only)
  • USB‑C sink behavior: Separate CC lines with Rd resistors:
  • ESD/Surge: D1 on D+/D−; D4 on VBUS.
  • Regulation: U4 generates 3.3 V; decouple with C1–C4 close to IN/OUT and add local 100 nF near U1 and U3.
  • Native USB note: For V1, USB data is not connected to ESP32‑C3; programming uses UART test pads.
  1. I2C bus and peripherals
  • Signals:
    • SCL: U1 IO4 on net “SCL”; pulled up via R22 to 3V3; available on J3 pin 1; to U3:SCL.
    • SDA: U1 IO5 on net “SDA”; pulled up via R23 to 3V3; available on J3 pin 2; to U3:SDA.
  • Pull‑ups: 4.7 kΩ typical, placed near U1. Keep total bus capacitance within spec; the 30–50 cm harness is accounted for.
  1. FSR analog front‑end (4 channels)
  • Harness: J2 carries 4 FSR sense lines plus power and ground.
  • Per‑channel network (example, same pattern for all four):
    • Divider and sense/filter:
  • Notes:
    • Series/input protection and RC filtering mitigate noise from long harness runs.
    • ADC sampling at 1 Hz target; firmware to average a few samples for noise reduction.
    • Calibration: per‑user software calibration; optional BOM‑tunable resistor footprints for range adjustments.
  1. User interface, reset, and programming
  1. Pin map summary (current)
  • ESP32‑C3 core pins (project nets):
    • I2C: IO4 = SCL, IO5 = SDA.
    • Programming: IO21 = PROG_TX (UART0 TX), IO20 = PROG_RX (UART0 RX), IO0 = BOOT, EN = reset.
    • LEDs: IO6, IO7 used for indicator control.
    • FSR: Four ADC channels wired to nets FSR1–FSR4 via the front‑ends listed above.
  • Boot/strapping caution: IO0 and EN are strap/reset; avoid heavy loads or fixed external states during reset.
  1. RF and antenna plan
  • Primary: U1 integrated PCB antenna at a board edge with a datasheet‑compliant keep‑out (no copper/vias/components in front of the antenna).
  • Metal frame proximity: Validate RSSI/packet loss with the board mounted; if detuning occurs, pivot to U2 (external antenna option) with a remote antenna position away from metal.
  1. Connectors, harnessing, and mechanical
  • USB‑C: J1 for power‑only.
  • FSR harness: J2 6‑pin JST‑PH; route entries away from RF edge; add silkscreen pin‑1 marking.
  • I2C/power harness: J3 4‑pin JST‑PH; exposes SDA/SCL/VCC/GND for IMU or expansion.
  • Mounting: Place holes to avoid antenna aperture and thick structural members; keep cable egress clear of antenna region.
  1. ESD, protection, and grounding
  • USB:
    • D+/D− protected by D1 at connector side (low‑capacitance ESD).
    • VBUS protected by D4; consider inline fuse on VBUS if needed.
  • CC detection:
  • Ground strategy:
    • Single reference plane; short ESD return to J1; keep analog returns (FSR filters) close to the plane and away from high‑dv/dt paths.
  1. BOM and sourcing snapshot
  • All mains are LCSC‑backed; designed for JLCPCB assembly at qty‑100. Key line items by designator:
  • Availability: Selected parts are common and stocked; alternates can be added if any supply constraints arise at order time.
  1. Firmware data and update cadence
  • BLE data at 1 Hz: 4 FSR channels + basic IMU tilt; occupancy and duration counters as needed.
  • Programming path: UART via TP_PROG_TX/TP_PROG_RX with TP_BOOT and TP_EN. Native USB not used in V1.
  1. Test and calibration plan (bring‑up)
  • Power/USB: Verify no shorts; measure 5 V at J1 and 3.3 V at U4:OUT.
  • Programming: Confirm boot into UART download with IO0 low at reset; flash a simple LED blink on D2/D3.
  • I2C/IMU: Scan bus; read WHO_AM_I from U3.
  • FSRs: Confirm analog ranges with known loads; perform software baseline calibration.
  • RF soak: 8+ hour BLE link stability in chair frame environment; log RSSI/packet loss.
  1. Layout and DFM notes
  • Antenna: Keep‑out per module datasheet; place U1 at a board edge with no copper/vias/components in front of the antenna.
  • Analog vs digital: Keep FSR entries and RC filters away from USB and switching currents; short, direct ground returns to the plane.
  • ESD: Place D1 and D4 close to J1 with minimal inductance in the return path.
  1. Open items and next steps
  • Finalize routing and silkscreen keep‑out markings for the antenna aperture.
  • Confirm I2C and FSR pin assignments at firmware integration time; avoid sharing IO6 between LED and FSR in the next spin if possible.
  • Export manufacturing package: Gerbers, Pick‑and‑Place, and BOM CSV with LCSC numbers; attach assembly notes for the harness orientation and antenna placement.
  1. Revision control
  • Current intent: V1 power‑only USB‑C, 4× FSR channels, integrated antenna primary, external antenna fallback via U2. Any changes to pin mapping or parts will be recorded in the project properties and reflected in the BOM.
This description reflects the current design state and is intended for internal alignment, firmware planning, purchasing (LCSC/JLCPCB), and mechanical integration.
shorter executive summary
firmware interface details
manufacturing notes expansion
test procedure checklist
mechanical constraints
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J1
TP_PROG_TX
J2 Pin_6 - R9 P1
J2 Pin_5 - R5 P1
PROG_BOOT
J2 Pin_3 - R7 P1
SW1 2 - GND GND
U4 OUT - U1 3V3
J2 Pin_4 - R6 P1
PROG_BOOT
U1 IO9 - U3 SDA
TP_PROG_RX
U1 EN - SW1 1
J1 D2+ - D1 CATHODE_4
SW1 2 - GND GND
TP_EN
PROG_TX
TP_PROG_TX
PROG_BOOT
U1 EN - SW1 1
PROG_RX
J2 Pin_3 - R7 P1
J2 Pin_6 - R9 P1
SW1 2 - GND GND
U1 EN - SW1 1
SW1 2 - GND GND
J2 Pin_5 - R5 P1
SW1 2 - GND GND
PROG_RX
J2 Pin_5 - R5 P1
U1 IO8 - U3 SCL
J2 Pin_4 - R6 P1
J2 Pin_6 - R9 P1
C6
Capacitance
100nF
R10
Resistance
10kΩ
C5
Capacitance
100nF
D2
R4
Resistance
10kohms
C3
Capacitance
100nF
R3
Resistance
10kΩ
C2
Capacitance
100nF
C4
Capacitance
100nF
D3
R7
Resistance
10kΩ
R6
Resistance
10kΩ
R11
Resistance
10kΩ
R9
Resistance
10kΩ
R12
Resistance
10kΩ
R8
Resistance
10kΩ
D2
R2
Resistance
4.7kohms
R1
Resistance
4.7kohms
D3
GND
SW1
C7
Capacitance
100nF
C8
Capacitance
100nF
R5
Resistance
10kΩ
C1
Capacitance
100nF
  • Generic Inductor
    Generic Inductor
    A generic fixed inductor suitable for rapid circuit topology development. The footprint automatically adapts based on the selected package, supporting standard SMD sizes (e.g., 0402, 0603, 0805) as well as well-known inductor packages such as SDR1806, PA4320, SRN6028, and SRR1260. Standard inductor values: 1.0 nH, 10 nH, 100 nH, 1.0 µH, 10 µH, 100 µH, 1.0 mH 1.2 nH, 12 nH, 120 nH, 1.2 µH, 12 µH, 120 µH, 1.2 mH 1.5 nH, 15 nH, 150 nH, 1.5 µH, 15 µH, 150 µH, 1.5 mH 1.8 nH, 18 nH, 180 nH, 1.8 µH, 18 µH, 180 µH, 1.8 mH 2.2 nH, 22 nH, 220 nH, 2.2 µH, 22 µH, 220 µH, 2.2 mH 2.7 nH, 27 nH, 270 nH, 2.7 µH, 27 µH, 270 µH, 2.7 mH 3.3 nH, 33 nH, 330 nH, 3.3 µH, 33 µH, 330 µH, 3.3 mH 3.9 nH, 39 nH, 390 nH, 3.9 µH, 39 µH, 390 µH, 3.9 mH 4.7 nH, 47 nH, 470 nH, 4.7 µH, 47 µH, 470 µH, 4.7 mH 5.6 nH, 56 nH, 560 nH, 5.6 µH, 56 µH, 560 µH, 5.6 mH 6.8 nH, 68 nH, 680 nH, 6.8 µH, 68 µH, 680 µH, 6.8 mH 8.2 nH, 82 nH, 820 nH, 8.2 µH, 82 µH, 820 µH, 8.2 mH #generics #CommonPartsLibrary
    jharwinbarrozo
    16.2k
  • Generic Capacitor
    Generic Capacitor
    A generic fixed capacitor ideal for rapid circuit topology development. You can choose between polarized and non-polarized types, its symbol and the footprint will automatically adapt based on your selection. Supported options include standard SMD sizes for ceramic capacitors (e.g., 0402, 0603, 0805), SMD sizes for aluminum electrolytic capacitors, and through-hole footprints for polarized capacitors. Save precious design time by seamlessly add more information to this part (value, footprint, etc.) as it becomes available. Standard capacitor values: 1.0pF, 10pF, 100pF, 1000pF, 0.01uF, 0.1uF, 1.0uF, 10uF, 100uF, 1000uF, 10000uF 1.1pF, 11pF, 110pF, 1100pF 1.2pF, 12pF, 120pF, 1200pF 1.3pF, 13pF, 130pF, 1300pF 1.5pF, 15pF, 150pF, 1500pF, 0.015uF, 0.15uF, 1.5uF, 15uF, 150uF, 1500uF 1.6pF, 16pF, 160pF, 1600pF 1.8pF, 18pF, 180pF, 1800pF 2.0pF, 20pF, 200pF, 2000pF 2.2pF, 22pF, 220pF, 2200pF, 0.022uF, 0.22uF, 2.2uF, 22uF, 220uF, 2200uF 2.4pF, 24pF, 240pF, 2400pF 2.7pF, 27pF, 270pF, 2700pF 3.0pF, 30pF, 300pF, 3000pF 3.3pF, 33pF, 330pF, 3300pF, 0.033uF, 0.33uF, 3.3uF, 33uF, 330uF, 3300uF 3.6pF, 36pF, 360pF, 3600pF 3.9pF, 39pF, 390pF, 3900pF 4.3pF, 43pF, 430pF, 4300pF 4.7pF, 47pF, 470pF, 4700pF, 0.047uF, 0.47uF, 4.7uF, 47uF, 470uF, 4700uF 5.1pF, 51pF, 510pF, 5100pF 5.6pF, 56pF, 560pF, 5600pF 6.2pF, 62pF, 620pF, 6200pF 6.8pF, 68pF, 680pF, 6800pF, 0.068uF, 0.68uF, 6.8uF, 68uF, 680uF, 6800uF 7.5pF, 75pF, 750pF, 7500pF 8.2pF, 82pF, 820pF, 8200pF 9.1pF, 91pF, 910pF, 9100pF #generics #CommonPartsLibrary
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    1.5M
  • Generic Resistor
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    jharwinbarrozo
    1.5M
  • Ground
    Ground
    A common return path for electric current. Commonly known as ground.
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    20.5M
  • Terminal
    Terminal
    An electrical connector acting as reusable interface to a conductor and creating a point where external circuits can be connected.
    natarius
  • Net Portal
    Net Portal
    Wirelessly connects nets on schematic. Used to organize schematics and separate functional blocks. To wirelessly connect net portals, give them same designator. #portal
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    43.0M
  • RMCF0805JT47K0
    RMCF0805JT47K0
    General Purpose Thick Film Standard Power and High-Power Chip Resistor 47 kOhms ±5% 0.125W, 1/8W Chip Resistor 0805 (2012 Metric) Automotive AEC-Q200 Thick Film Features: - RMCF – standard power ratings - RMCP – high power ratings - Nickel barrier terminations standard - Power derating from 100% at 70ºC to zero at +155ºC - RoHS compliant, REACH compliant, and halogen free - AEC-Q200 compliant
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    1.2M
  • 875105359001
    875105359001
    10 µF 16 V Aluminum - Polymer Capacitors Radial, Can - SMD 30mOhm 2000 Hrs @ 105°C #commonpartslibrary #capacitor #aluminumpolymer #radialcan
    jharwinbarrozo
    1.2M
  • CTL1206FYW1T
    CTL1206FYW1T
    Yellow 595nm LED Indication - Discrete 1.7V 1206 (3216 Metric)
    jharwinbarrozo
    1.1M
  • 1070TR
    1070TR
    Battery Holder (Open) Coin, 20.0mm 1 Cell SMD (SMT) Tab bate or batt #forLedBlink
    jharwinbarrozo
    700.5k
Brainstorm a new project with AI [Example] thumbnail
Smart Chair V1: ESP32-C3-based seat-occupancy and posture sensing hub with 4× FSR channels and IMU over I2C, featuring corrected USB-C power wiring with TVS protection, remapped I2C on IO4/IO5 with pull-ups, dedicated PROG_TX/PROG_RX/BOOT/EN test pads, and antenna keep-out zone #consumer-electronics #BLE #I2C #USB-C #IoT

Properties

mm

Pricing & Availability

Distributor

Qty 1

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