“The schematic and layout editors are bidirectionally synchronized in real time. Bidirectional Sync means any changes in the schematic automatically update the PCB layout and vice-versa without the need to create a netlist or ECO.”

1. In the top-centre tab bar click PCB.
2. The canvas will already contain every footprint you assigned. If something is missing, go back to Schematic → ⟳ Refresh (keyboard R) and re-open PCB.

1. Switch to PCB tab.
2. In the Object Tree → Layout select Board Outline.
3. In the right-hand inspector enter exact width, height and corner-radius.
   • Example 100 mm × 80 mm, 2 mm radius.
4. Drag vertices or press Tab → Add Point to make cut-outs.
5. Keep 2 mm mechanical clearance from the outline to copper.

1. In Layout → Stackup choose 2-Layer_1oz (default is 35 µm copper).
2. If you need heavier copper (e.g. 2 oz / 70 µm) click ➕ Add Layer → Configure and pick “Copper 2 oz”.
3. Name layers clearly (Top, Bottom, GND Plane, etc.).

1. View → Toggle Airwires (W) so you can see rat lines.
2. Enable a coarse grid: G key → 1 mm.
3. Group-place:
   • Power-entry parts (jack, TVS, buck) near one edge.
   • MCU in centre.
   • Decoupling capacitors within 2–3 mm of their IC pins.
   • High-current MOSFETs & terminal blocks near board edge for heat dissipation.
4. Rotate parts: R key while selected.
5. Use the alignment helpers (Shift-click → Align Left / Align Top) for clean rows.
6. When done, switch to a finer 0.25 mm grid and nudge caps, LEDs, etc.

1. Press Shift + P → Add Copper Fill.
2. Inspector settings:
   • Net: GND
   • Layer: Bottom (or both if multi-layer)
   • Clearance: 0.25 mm (tight digital) or 0.5 mm (mixed-voltage)
   • Thermal relief: Enabled for through-hole.
3. Draw the polygon around the whole board outline.
4. Repeat on Top layer for 5 V or 3 V3 if you want a solid power plane.
5. Tip: run M → Re-Pour All after every big routing change.

1. Press X (Route) and click the first pad.
2. Hold Shift for 45-degree locking.
3. Change width on-the-fly with W → pick 0.2 / 0.3 / 0.6 mm.
4. Right-click → Add Via (V) to swap layers.
5. Keep decoupling capacitor routes <10 mm long.
6. Drag completed tracks with D to clean geometry.
7. When finished press M → Hide Airwires—only power pours should remain.

1. Select silkscreen layer in the layer list.
2. Ctrl-A → Properties → Min Line Width 0.15 mm.
3. Drag refs so they do not sit under components.
4. Add board title & logo with Shift-T (Text).

1. Right-sidebar → ERC/DRC Review tab.
2. Click Run DRC.
3. Fix any red items:
   • Clearance → widen track or move via.
   • Unconnected pin → finish trace.
   • Overlapping copper → redraw pours, re-pour.

“Real-time synchronization eliminates the risk of design discrepancies.”

1. 2D/3D Toggle at left of the canvas.
2. Spin board, confirm no silkscreen on pads, tall parts don’t collide.
3. In 2D select Tools → Measure and verify clearance from outline.

1. Project Menu (upper-left) → Export → Gerber & Drill.
2. Layers to include:
   • Top copper (GTL) / Bottom copper (GBL)
   • Drills (TXT or EXCELLON)
   • Soldermask, Silkscreen, Board Outline (GKO)
3. Flux packs everything into a ZIP you can upload to JLCPCB, PCBWay, etc.
4. Save the ZIP and open it in an online Gerber viewer to double-check.

• Press F mid-route to flip the 45-degree miter to its mirror image.
• Shift + Drag on a component moves it and reroutes the attached nets (“hug-and-push”).
• Auto-Layout preview: if you’re stuck, click AI → Auto-Layout for a suggested routing, then “Undo” (Ctrl-Z) but keep the ideas.
• For high-current MOSFET drains use Polygon Pour (same net) instead of a fat track to improve thermal conduction.
• Add tooling holes: Shift + O → Ø2.5 mm NPTH at corners.