The 60 mm width is tight but workable if the high-current bus runs lengthwise.
I now recommend reserving a 40–50 mm effective copper/busbar corridor for aggregate 6S current and keeping logic/regulator/ADC routing outside that corridor.
are both the power management PCB and ESC PCB ready to be modelled in your PCB viewer?
Thought
flux
97 days ago
I’ll quickly check the schematic/layout readiness state for the ESC and power-management sections, then tell you whether they’re ready for PCB modeling or what must be fixed first.
Thought
flux
97 days ago
Not yet. The PCB viewer can show a rough layout now, but the ESC PCB and power-management PCB are not ready for meaningful PCB modeling/layout release.
Main blockers:
Current board outline is 160 mm × 100 mm, not your required ≤60 mm × 200 mm.
ESC schematic is incomplete: MOSFET power stages, gate-drive support, current sense, bulk capacitance, MCU↔DRV8308 control wiring, reset/boot/debug, and decoupling still need completion.
ERC still has many unfinished MCU/DRV8308 floating-pin warnings.
PM board is closer, but still has one known ERC issue: U7 NC tied to SW, which is datasheet-guided but tool-flagged.
Placement is congested around motor connectors/drivers and needs a deliberate split/placement plan.
Recommended next steps:
Decide board partition: separate ESC PCB + PM PCB, or one combined board within 60 × 200 mm.
Finish the ESC schematic power stages and support passives.
Set the board outline(s) to the 60 × 200 mm limit.
Then run structured PCB placement for PM high-current corridor, four motor stages, MCUs, connectors, and thermal sensors.