Quad BLDC Drone ESC Design

flux

I’ll quickly check the schematic/layout readiness state for the ESC and power-management sections, then tell you whether they’re ready for PCB modeling or what must be fixed first.

flux

Not yet. The PCB viewer can show a rough layout now, but the ESC PCB and power-management PCB are not ready for meaningful PCB modeling/layout release.
Main blockers:
  • Current board outline is 160 mm × 100 mm, not your required ≤60 mm × 200 mm.
  • ESC schematic is incomplete: MOSFET power stages, gate-drive support, current sense, bulk capacitance, MCU↔DRV8308 control wiring, reset/boot/debug, and decoupling still need completion.
  • ERC still has many unfinished MCU/DRV8308 floating-pin warnings.
  • PM board is closer, but still has one known ERC issue: U7 NC tied to SW, which is datasheet-guided but tool-flagged.
  • Placement is congested around motor connectors/drivers and needs a deliberate split/placement plan.
Recommended next steps:
  1. Decide board partition: separate ESC PCB + PM PCB, or one combined board within 60 × 200 mm.
  2. Finish the ESC schematic power stages and support passives.
  3. Set the board outline(s) to the 60 × 200 mm limit.
  4. Then run structured PCB placement for PM high-current corridor, four motor stages, MCUs, connectors, and thermal sensors.
Choose separate boards
Finish ESC schematic
Set board outlines
Fix PM ERC
Plan component placement
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Firmware Starter — Dual STM32G474 + 4× DRV8308
Platform & Toolchain
  • MCU: 2 × STM32G474CBT6
  • Framework: STM32 HAL / STM32CubeIDE
  • Status: Preliminary, because final MCU pin assignments to DRV8308 SPI/control/fault nets are not yet wired.
Current Hardware Partition

Table

MCUMotor ChannelsDRV8308sRole
U1M1, M2U3, U4Configure/control front two DRV8308 channels
U2M3, M4U5, U6Configure/control rear two DRV8308 channels
Required Firmware-Controlled Signals Per DRV8308

Table

FunctionDRV8308 PinFirmware Use
SPI SCLKSCLKRegister configuration
SPI CSSCSPer-driver chip select
SPI MOSISDATAIRegister write
SPI MISOSDATAORegister readback
Speed commandCLKINPWM/frequency speed command
DirectionDIRMotor direction
EnableENABLEHardware motor enable
BrakeBRAKEBraking command/failsafe
ResetRESETDriver reset
FaultFAULTnFault interrupt/input
Lock/statusLOCKnSpeed lock/status input
Speed feedbackFGOUTOptional timer input capture
Pin Mapping
Final STM32 pin mapping is TBD. The schematic currently contains the main ICs and Hall/motor connectors, but MCU-to-DRV control nets are intentionally not finalized until the flight-controller interface and firmware strategy are chosen.
Minimal HAL Structure
C
#include "main.h"
#include <stdint.h>
#include <stdbool.h>

SPI_HandleTypeDef hspi1;
TIM_HandleTypeDef htim1;

#define DRV_COUNT 2

typedef struct {
    GPIO_TypeDef *cs_port;
    uint16_t cs_pin;
    GPIO_TypeDef *enable_port;
    uint16_t enable_pin;
    GPIO_TypeDef *brake_port;
    uint16_t brake_pin;
    GPIO_TypeDef *fault_port;
    uint16_t fault_pin;
} drv8308_t;

static drv8308_t drv[DRV_COUNT];

static uint16_t drv8308_transfer(uint8_t idx, uint16_t word) {
    uint8_t tx[2] = { (uint8_t)(word >> 8), (uint8_t)(word & 0xFF) };
    uint8_t rx[2] = {0};
    HAL_GPIO_WritePin(drv[idx].cs_port, drv[idx].cs_pin, GPIO_PIN_RESET);
    HAL_SPI_TransmitReceive(&hspi1, tx, rx, 2, HAL_MAX_DELAY);
    HAL_GPIO_WritePin(drv[idx].cs_port, drv[idx].cs_pin, GPIO_PIN_SET);
    return ((uint16_t)rx[0] << 8) | rx[1];
}

static void drv8308_write_baseline_open_loop(uint8_t idx) {
    const uint16_t cfg[][2] = {
        {0x00, 0x0911}, {0x01, 0x0000}, {0x02, 0x04FF}, {0x03, 0x6800},
        {0x04, 0x40D2}, {0x05, 0x0000}, {0x06, 0x0000}, {0x07, 0x0000},
        {0x08, 0x0000}, {0x09, 0x0000}, {0x0A, 0xF000}, {0x0B, 0x0000}
    };
    for (uint32_t i = 0; i < sizeof(cfg)/sizeof(cfg[0]); i++) {
        uint16_t word = (uint16_t)((cfg[i][0] << 12) | (cfg[i][1] & 0x0FFF));
        (void)drv8308_transfer(idx, word);
    }
}

static void drv8308_enable(uint8_t idx, bool en) {
    HAL_GPIO_WritePin(drv[idx].enable_port, drv[idx].enable_pin, en ? GPIO_PIN_SET : GPIO_PIN_RESET);
}

int main(void) {
    HAL_Init();
    SystemClock_Config();
    MX_GPIO_Init();
    MX_SPI1_Init();
    MX_TIM1_Init();

    for (uint8_t i = 0; i < DRV_COUNT; i++) {
        drv8308_enable(i, false);
        drv8308_write_baseline_open_loop(i);
    }

    while (1) {
        for (uint8_t i = 0; i < DRV_COUNT; i++) {
            if (HAL_GPIO_ReadPin(drv[i].fault_port, drv[i].fault_pin) == GPIO_PIN_RESET) {
                drv8308_enable(i, false);
            }
        }
        HAL_Delay(1);
    }
}
Open Firmware Items
  • Assign actual STM32 GPIOs for each DRV8308 control/status pin.
  • Select inter-MCU link: FDCAN, SPI, or UART.
  • Select flight-controller interface: PWM, DShot, CAN, UART, or SPI.
  • Define arming, throttle ramp, fault latch, and failsafe behavior.
  • Confirm whether DRV8308 registers are configured by SPI on every boot, external EEPROM, or OTP.

    Platform & Toolchain

    Current Hardware Partition

    Required Firmware-Controlled Signals Per DRV8308

    Pin Mapping

    Minimal HAL Structure

    Open Firmware Items

Documents

    Firmware Starter — Dual STM32G474 + 4× DRV8308

    Power Stage Sizing Notes — Quad BLDC Drone ESC

    Preliminary FMEA — Quad BLDC Drone ESC

    Project Specification — Quad BLDC Drone ESC

    ESC Power and Current Sizing Notes

    Power Management Board Notes

Assets

Assets are files uploaded to this project which can be used in various ways.

Interceptor 3948 thumbnail
Quad BLDC Drone interceptor with dual STM32G474 controllers, sensored motor feedback, and 22 V battery input.

Properties

Pricing & Availability

Distributor

Qty 1

Arrow

$21.94–$27.51

Digi-Key

$7.49–$8.16

HQonline

$1.32–$1.47

LCSC

$25.96–$26.39

Mouser

$49.05–$49.75

TME

$3.40–$4.49

Verical

$27.47–$34.50

Controls