Mini UPS PCB Design
0:59
Considering tool usage for issues.
Running design review.
Analyzing the schematic.
Addressing power output concerns.
Running design review.
VCC on HV_BUSHV_BUS is fed through the ideal-diode path:Status summary
| Check | Status |
|---|---|
| Floating pins | Fixed |
| No-connect violations | Clean |
| Pin-to-pin conflicts | Clean |
| Shorted components | Clean |
| Undriven nets | Clean |
| Single-pin nets | Clean |
Missing power on U3 VCC | Still flagged |
Applied changes.
0:02
nets {
net BATTERY_IN = Q2:S, R3:P1, R4:P1, U2:IN, C2:P1, F2:2;
net GND = D3:A, J4:PIN2, J3:Neg, R5:P2, U3:GND, C8:P2, R6:P2, C3:P2, Q4:E, C1:P2, Q3:E, C2:P2, C4:P2, C7:P2, U2:GND, U2:OFF, J2:Terminal, U1:GND, U1:OFF, J1:Terminal, R1:P2, D2:A, D1:A;
net Net 2 = U2:GATE, Q2:G;
net ADAPTER_IN = R2:P1, R8:P1, Q1:S, F1:2, C1:P1, U1:IN;
net HV_BUS = C4:P1, C3:P1, Q1:D, U1:OUT, U3:EN, U3:VCC, U2:OUT, Q2:D;
net gate_driver_mosfet_1 = Q1:G, U1:GATE;
}
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