Attachment Review

see the mechanical specification and pin config
2026-07-13 16_32_21-MEAN WELL SKA60 DATA SHEET.pdf - Adobe Acrobat (64-bit).png

Image

Yes — I see it: the SKA60 uses a non-uniform 8-pin bottom-view pattern, not a simple 5.08mm grid. I’ll check the current U1 footprint against those coordinates and record/fix the footprint risk.
Updated U1 to match the attached SKA60 mechanical spec: the footprint now uses the non-uniform bottom-view 8-pin pattern and 1.3mm drilled / 2.2mm pads for the 1.0mm pins.
Open items:
  • The published custom part may still need the same footprint correction; I applied overrides in this project layout.
  • DRC still reports airwires because routing has not been done yet.
Documented here: PCB Layout Notes.
Fix part, route, review
Fix custom part
Route the board
Run full DRC
Explain pin pattern
F2
F5
F4
U1
F3
MH2
J2
F1 P2 - Q1 D
R1 P2 - D1 2
J1 P1 - F1 P1
R2 P2 - D2 2
F1 P2 - Q1 D
J1 P1 - F1 P1
J5
F4 OUT - J4 P1
U1 +R.S - C2 P1
F3 OUT - J3 P1
U1 +R.S - C2 P1
MH4
U1 +R.S - C2 P1
Q1 S - D4 C
F5 OUT - J5 P1
F4 OUT - J4 P1
J4
F2 OUT - J2 P1
F3 OUT - J3 P1
U1 +R.S - C2 P1
J3
Q1 S - D4 C
F4 IN - F5 IN
U1 +R.S - C2 P1
Q1 G - D4 A
R2 P2 - D2 2
Q1 S - D4 C
F2 OUT - J2 P1
Q1 S - D4 C
J1
F1 P2 - Q1 D
Q1 S - D4 C
F4 IN - F5 IN
R1 P2 - D1 2
MH3
F5 OUT - J5 P1
MH1
Q1 G - D4 A
Q1 S - D4 C
Q1 G - D4 A
GND
C2
Capacitance
100uF
GND
D3 A - R3 P2
U1 -R.S - C2 P2
U1 -R.S - C2 P2
F1
C1
Capacitance
1uF
U1 -R.S - C2 P2
U1 -R.S - C2 P2
R3
Resistance
100kΩ
D1 1 - D2 1
R2
Resistance
1kΩ
D1 1 - D2 1
Q1
D2
D3 A - R3 P2
GND
R1
Resistance
2.2kΩ
U1 -R.S - C2 P2
GND
C3
Capacitance
1uF
D4
D1
U1 -R.S - C2 P2
D3

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PCB Layout Notes
Board Setup
  • Board outline set to 75mm × 75mm rectangle with 2mm corner radius.
  • Stackup set to Standard 2 Layer.
  • Universal keepout / board inset set to 1mm.
  • 75mm width is treated as the hard maximum. Depth was set to the allowed 75mm maximum because the SKA60B-12 module and connector/protection hardware make the board extremely dense.
Added Input Protection
  • Q1: QM6015D P-channel MOSFET added as high-side reverse-polarity protection.
    • F1 output / TVS / Q1 drain net: 24V_FUSED_PRE_REV.
    • Q1 source / protected load side: 24V_FUSED.
    • Q1 gate net: Q1_GATE.
  • D3: SMBJ33A TVS from 24V_FUSED_PRE_REV to GND.
  • D4: BZX79C12 12V zener clamp from Q1 source to Q1 gate.
  • R3: 100kΩ gate pull-down from Q1_GATE to GND.
Placement Summary
  • J1-J5 are placed in a straight row along the bottom long edge, ordered J1, J2, J3, J4, J5.
  • U1 SKA60B-12 is centered above the connector row.
  • F1 and input protection parts are grouped near J1.
  • F2-F5 are near their corresponding output connectors.
  • MH1-MH4 are placed at the four board corners.
  • D1/D2 indicators are placed near the right/visible edge.
  • To fit inside the 75mm × 75mm limit, small support parts C1, C2, C3, R3, D3, and D4 are on the bottom layer. Major connectors, fuse/PTCs, SKA60 module, LEDs, and mounting holes remain on the top layer.
SKA60B-12 Mechanical Pin Pattern
The attached Mean Well SKA60 datasheet shows a non-uniform 8-pin bottom-view footprint, not a simple 5.08mm grid. U1 pad overrides were applied in the PCB layout using the datasheet mechanical drawing.
Using the 50.8mm × 50.8mm body center as the footprint origin, the U1 pad positions are:

Table


PinFunctionX from body centerY from body center
1R.C20.32mm10.16mm
2-Vin12.70mm10.16mm
3+Vin5.08mm10.16mm
4-R.S5.08mm-2.54mm
5+R.S12.70mm-2.54mm
6+Vout20.32mm-2.54mm
7-Vout12.70mm20.32mm
8TRIM20.32mm20.32mm
All U1 pads were set as through-hole pads with 1.3mm drills and 2.2mm circular pads for the datasheet's 1.0mm diameter pins. These are project-level footprint overrides; verify against the physical module before fabrication.
DRC / Review Status After Placement
  • No component-overlap or out-of-board placement errors are currently reported.
  • Airwires remain because routing has not been performed yet. This is expected after placement.
  • Manufacturing review still flags missing MPNs for generic passives and the generic fuse holder:
    • C1, C2, C3
    • R1, R2, R3
    • F1
  • Board density remains critical at approximately 77.6% component-area fill. The layout is possible only by using the bottom layer for small support passives; single-sided assembly inside 75mm × 75mm is not realistic with the current component set.
Layout Risks / Next Actions
  • Routing should use wide copper pours for 24V_FUSED, 24V_OUT, 12V, and GND rather than narrow traces.
  • Bottom GND pour should be preserved for return current, but bottom passives now occupy some of that layer.
  • PTCs are near the connector row and close to U1 due to space limits; thermal validation at 60°C enclosed ambient remains required.
  • Before manufacturing, assign exact MPNs for generic passives and F1, then route power first and rerun DRC.
  • Board Setup

  • Added Input Protection

  • Placement Summary

  • SKA60B-12 Mechanical Pin Pattern

  • DRC / Review Status After Placement

  • Layout Risks / Next Actions

Documents

  • Project Specification

  • Schematic Design Notes

  • Board Bring-Up Plan — 24V/12V Wall Power Distribution Board

  • PCB Layout Notes

Assets

No assets added.

24V/12V Wall Power Distribution Board

24V/12V Wall Power Distribution Board thumbnail
Low-voltage DC distribution board for an Australian faceplate: 24V input with fused 24V pass-through and isolated 12V/5A conversion feeding three individually protected 12V outputs in a 75 × 75 mm envelope.

Properties

Power Distribution

2-layer PCB, single-sided assembly, through-hole power components, 75x75mm max

60

°C

24

V

Pricing & Availability

Distributor

Qty 1

Arrow

$57.67–$59.39

Digi-Key

$0.00

HQonline

$4.63

LCSC

$3.29

Mouser

$47.14

TME

$5.81

Verical

$61.80–$71.96

Controls