Here’s what the Onsemi NCP1117 (SOT-223) requires around U1, quoted from its datasheet (NCP1117-D):
Input capacitor (Cin)
Value/type: 10 µF ceramic or tantalum is adequate for most applications.
When needed: Use Cin if the regulator is more than “a few inches” from the source or the source impedance is complex.
Placement: Mount with the shortest possible track directly across VIN–GND pins.
Output capacitor (Cout) – mandatory for stability
Minimum capacitance: 4.7 µF.
ESR window: 0.033 Ω (typ) to 2.2 Ω over operating temperature.
Allowed types: ceramic, tantalum, or aluminum electrolytic, as long as the effective capacitance and ESR stay within the limits across temperature.
Typical application: 10 µF at the output is shown in the reference circuit.
Placement: Keep Cout close to VOUT–GND.
Practical recommendations (aligning to the datasheet and good practice)
Cin: 10 µF X7R ceramic, 10 V or higher. Place right at VIN–GND of U1.
Cout: 10–22 µF tantalum or aluminum electrolytic that guarantees ESR within 0.033–2.2 Ω across temperature. Place at VOUT–GND of U1.
Optional: a small 0.1 µF ceramic in parallel with Cout for high‑frequency decoupling (ensure the total network still respects the ESR window).
Voltage rating/derating: choose capacitor voltage so operating voltage is at or below 60% of its rating (knowledge rule). For 5 V input and 3.3 V output rails, 10–16 V rated parts are typically appropriate.
If you’d like, I can swap U1 to NCP1117ST33T3G and set Cin = 10 µF ceramic, Cout = 22 µF tantalum (ESR in-spec), placed per the datasheet.