Part Information Review and Analysis
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Looking for "latch up current in absolute maximum ratings" in RTS5306E.pdf
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Part review summary
Datasheet metadata extracted
Pin description summary
Symbol and footprint cross-check
Manufacturing / ordering / board-failure risk assessment
Bottom line
I completed the review for RTS5306E-GR.
- A datasheet URL is already set on the part project, so step 2 did not require a property update.
- I also checked the web: I did not find a clear official Realtek-hosted PDF result. The current URL appears to be an aggregator/source page, but it was enough to extract the needed datasheet content.
Project metadata
| Field | Value |
|---|---|
| MPN | RTS5306E-GR |
| Manufacturer | Realtek |
| Description | USB 3.0 SD/MMC Card Reader Controller |
| Package | QFN-32, 5 mm x 5 mm |
| Pin count | 32 leads + exposed pad |
| Footprint asset | QFN50P500X500X90-33N.kicad_mod |
| 3D model asset | RTS5306E-GR.stp |
| Symbol style | One-pin-per-terminal symbol, 33 terminals total |
Features and function
| Item | Datasheet detail |
|---|---|
| USB support | USB 3.0 Rev 1.0, USB mass storage bulk-only |
| Speed modes | 5 Gbps, 480 Mbps, 12 Mbps |
| Card support | SD, MMC, Mini-SD, Micro-SD, SDHC, SDXC, RS-MMC, Mobile-MMC, MMCPlus, MMC-micro |
| MCU | Integrated Fast 8051 |
| Regulators | On-chip 3.3 V and 1.2 V regulators |
| Card power control | On-chip MOSFETs for direct card power control |
| SD clock support | 208 MHz max for SDR104, 100 MHz max for SDR50, 50 MHz max for DDR50 |
| Power saving | USB 2.0 LPM / USB 3.0 U1/U2/U3 |
| EEPROM / flash | External serial flash interface supported |
Absolute maximum ratings
| Parameter | Value |
|---|---|
| Supply voltage | -0.5 V to +5.5 V |
| Operating temperature range | 0 °C to +70 °C |
| Latch-up current | Present in source, but numeric value was not extractable from the scanned source |
| ESD voltage, HBM | Present in source, but numeric value was not extractable from the scanned source |
Recommended operating conditions / DC characteristics
| Parameter | Min | Typ | Max | Unit |
|---|---|---|---|---|
| VDD supply voltage | 4.5 | 5.0 | 5.5 | V |
| VIH | 2.0 | V | ||
| VIL | 0.8 | V | ||
| VOH | 3.0 | V | ||
| VOL | 0.4 | V | ||
| Input pin capacitance | 10 | pF | ||
| IDD | TBD | mA | ||
| ISUS | TBD | uA |
Power domains
| Domain | Pins |
|---|---|
| 5 V input | Pins 8, 14 |
| 3.3 V | Pins 7, 15, output on 16 |
| 1.2 V | Pins 5, 11, 25, 32 |
| Regulator-related | Pin 17 requires an external capacitor |
| Ground requirement | Exposed pad shall be connected to GND |
Package dimensions
| Symbol | Min (mm) | Nom (mm) | Max (mm) |
|---|---|---|---|
| A | 0.80 | 0.85 | 0.90 |
| A1 | 0.00 | 0.02 | 0.05 |
| A3 | 0.20 REF | ||
| A4 | 0.10 REF | ||
| b | 0.18 | 0.25 | 0.30 |
| D / E | 5.00 BSC | ||
| D2 / E2 | 3.25 | 3.50 | 3.75 |
| e | 0.50 BSC | ||
| L | 0.30 | 0.40 | 0.50 |
Key pins
| Pin | Signal | Function |
|---|---|---|
| 1 | SS_RX+ | USB 3.0 RX D+ |
| 2 | SS_RX- | USB 3.0 RX D- |
| 3 | SS_TX+ | USB 3.0 TX D+ |
| 4 | SS_TX- | USB 3.0 TX D+ as extracted from source |
| 8, 14 | VBUS | 5 V input |
| 9, 10 | XTLI, XTLO | 12 MHz crystal input/output |
| 12, 13 | DM, DP | USB 2.0 D-, D+ |
| 16 | CARD_3V3 | Card power output |
| 17 | SDREG | Internal regulator output, external capacitor required |
| 18-24 | SD bus pins | SD_D1, SD_D0, SD_CLK, SD_CMD, SD_D3, SD_D2, SD_WP |
| 26-29 | EEPROM / flash | MOSI, SCK, CS#, MISO |
| 31 | SD_CD# | Card detect |
| 33 | Exposed pad | Must connect to GND |
What matches
| Check | Result |
|---|---|
| Lead package | Match: symbol/footprint implement 32 leads |
| Exposed pad presence | Match: footprint includes pad 33 |
| Exposed pad grounding intent | Mostly match: symbol has GND as pin 33, which is consistent with the datasheet note that the e-pad shall connect to ground |
| Footprint family | Match: footprint geometry name indicates 0.50 mm pitch, 5 x 5 mm QFN |
| Pad count | Match: footprint is effectively 33 copper pads for 32 leads + EP |
Issues flagged
| Severity | Finding | Why it matters |
|---|---|---|
| High | All schematic terminals have pin type Unspecified | This weakens ERC and increases risk of wiring mistakes in downstream designs using this part |
| High | Datasheet names both pins 8 and 14 as VBUS, but symbol uses VBUS_1 and VBUS_2 | Not a manufacturing issue by itself, but it is a symbol naming mismatch that can confuse users and obscure same-net intent |
| Medium | Exposed pad is represented as GND rather than explicitly as EP or Exposed Pad tied to ground | Electrically acceptable, but less clear than labeling it as EP/GND; can cause confusion during review or library reuse |
| Medium | The source pin description for pin 4 says SS_TX- = USB3.0 SuperSpeed TX D+ | That appears internally inconsistent and should be treated as a likely datasheet text/source typo until verified against a cleaner copy |
| Medium | No fully verified official Realtek PDF source was found | For a library-grade part, relying on aggregator copies increases risk of OCR or mirror errors |
| Low | The scanned source did not yield numeric latch-up and HBM ESD values | Incomplete metadata may reduce confidence for qualification review |
Risk assessment
| Risk area | Status | Notes |
|---|---|---|
| Wrong package ordered | Low risk | Package, pitch, body size, and pad count align with QFN-32 5 x 5 mm + EP |
| Footprint causing assembly failure | Low risk | Footprint shape is consistent with the datasheet dimensions available |
| Board failure from missing EP ground | Medium risk if used incorrectly | The footprint has the EP, but users must ensure pin 33 is connected properly in designs |
| Functional failure from symbol ambiguity | Medium risk | Unspecified pin types and split VBUS naming could lead to misuse |
| Datasheet-source integrity | Medium risk | A cleaner official PDF would improve confidence |
- The footprint looks fundamentally correct for a 32-pin 5 x 5 mm QFN with exposed pad.
- The biggest issues are symbol quality, not footprint geometry:
Pin correction checklist
Review footprint geometry
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Reviews
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Assets
RTS5306E-GR
RTS5306E-GR Symbol.svgDefaultRTS5306E-GR
RTS5306E-GR.stp3D Modelkicad_mod
RTS5306E-GR
QFN50P500X500X90-33N.kicad_modFootprint
RTS5306E-GR-thumb.png
RTS5306E-GR-thumbThumbnailControls
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