Pin Function Grouping for nRF52840
Table
| Section | Included pins | Rationale |
|---|---|---|
| Power Supply | 1, 12, 17, 25, 32, 33, 34, 37, 45, 46, 47, 48, 49 | VDD, VSS/VSS_PA, exposed pad, DCC, and DEC regulator/decoupling pins. |
| Clock | 2, 3, 35, 36 | LF crystal pins XL1/XL2 and HF crystal pins XC1/XC2. |
| Analog | 4, 5, 39, 40, 41, 42, 43, 44 | GPIO pins with SAADC analog input functions AIN0-AIN7. |
| GPIO | 7, 8, 13, 14, 15, 18, 19, 20, 21, 22, 23, 38 | General digital GPIO without a higher-priority dedicated symbol group. |
| Debug | 6, 9, 10, 11, 24, 26, 27 | SWD and trace pins. |
| Reset | 16 | P0.18/nRESET, separated for visibility because reset is a board-level control signal. |
| Interface | 29, 30 | NFC antenna pins NFC1/NFC2. |
| Communication | 31 | 2.4 GHz RF antenna pin ANT. |
| MISC | 28 | No-connect pin. |
Table
| Pin | Terminal | Section | Pin Group | Pin Type | Description |
|---|---|---|---|---|---|
| 1 | DEC1 | Power Supply | Power | Power Out | 1.1 V regulator supply decoupling; connect required capacitor per Nordic reference design. |
| 2 | P0.00XL1 | Clock | Crystal | Bi-Directional | GPIO P0.00; 32.768 kHz low-frequency crystal input XL1. |
| 3 | P0.01_XL2 | Clock | Crystal | Bi-Directional | GPIO P0.01; 32.768 kHz low-frequency crystal output XL2. |
| 4 | P0.04_AIN2 | Analog | ADC | Bi-Directional | GPIO P0.04; SAADC analog input AIN2. |
| 5 | P0.05AIN3 | Analog | ADC | Bi-Directional | GPIO P0.05; SAADC analog input AIN3. |
| 6 | P0.07TRACECLK | Debug | Debug | Bi-Directional | GPIO P0.07; trace buffer clock output TRACECLK. |
| 7 | P0.08 | GPIO | PA | Bi-Directional | General purpose I/O P0.08. |
| 8 | P1.08 | GPIO | PB | Bi-Directional | General purpose I/O P1.08. |
| 9 | P1.09TRACEDATA3 | Debug | Debug | Bi-Directional | GPIO P1.09; trace buffer data output TRACEDATA[3]. |
| 10 | P0.11TRACEDATA2 | Debug | Debug | Bi-Directional | GPIO P0.11; trace buffer data output TRACEDATA[2]. |
| 11 | P0.12TRACEDATA1 | Debug | Debug | Bi-Directional | GPIO P0.12; trace buffer data output TRACEDATA[1]. |
| 12 | VDD_1 | Power Supply | VDD | Power In | Main VDD power supply input. |
| 13 | P0.13 | GPIO | PA | Bi-Directional | General purpose I/O P0.13. |
| 14 | P0.14 | GPIO | PA | Bi-Directional | General purpose I/O P0.14. |
| 15 | P0.17 | GPIO | PA | Bi-Directional | General purpose I/O P0.17. |
| 16 | P0.18NRESET | Reset | Reset / GPIO | Bi-Directional | GPIO P0.18; configurable system reset nRESET. |
| 17 | VDD_2 | Power Supply | VDD | Power In | Main VDD power supply input. |
| 18 | P0.19 | GPIO | PA | Bi-Directional | General purpose I/O P0.19. |
| 19 | P0.20 | GPIO | PA | Bi-Directional | General purpose I/O P0.20. |
| 20 | P0.21 | GPIO | PA | Bi-Directional | General purpose I/O P0.21. |
| 21 | P0.22 | GPIO | PA | Bi-Directional | General purpose I/O P0.22. |
| 22 | P0.23 | GPIO | PA | Bi-Directional | General purpose I/O P0.23. |
| 23 | P0.24 | GPIO | PA | Bi-Directional | General purpose I/O P0.24. |
| 24 | P1.00TRACEDATA0 | Debug | Debug | Bi-Directional | GPIO P1.00; trace buffer data output TRACEDATA[0], also used for SWO. |
| 25 | VDD_3 | Power Supply | VDD | Power In | Main VDD power supply input. |
| 26 | SWDIO | Debug | SWD | Bi-Directional | Serial wire debug data for programming and debug. |
| 27 | SWDCLK | Debug | SWD | Input | Serial wire debug clock input for programming and debug. |
| 28 | NC | MISC | No connect | Not Connected | No internal connection; leave unconnected. |
| 29 | P0.09NFC1 | Interface | NFC antenna / GPIO | Bi-Directional | GPIO P0.09; NFC antenna connection NFC1. |
| 30 | P0.10NFC2 | Interface | NFC antenna / GPIO | Bi-Directional | GPIO P0.10; NFC antenna connection NFC2. |
| 31 | ANT | Communication | 2.4 GHz RF | Passive | Single-ended 2.4 GHz radio antenna connection; follow Nordic RF reference layout. |
| 32 | VSS_PA | Power Supply | VSS | Ground | Ground for radio power amplifier supply. |
| 33 | DEC6 | Power Supply | Power | Power Out | 1.3 V radio regulator supply decoupling; decouple per Nordic reference circuit. |
| 34 | DEC3 | Power Supply | Power | Power Out | Internal supply decoupling pin; connect capacitor per Nordic reference circuit. |
| 35 | XC1 | Clock | Crystal | Input | 32 MHz high-frequency crystal connection XC1. |
| 36 | XC2 | Clock | Crystal | Output | 32 MHz high-frequency crystal connection XC2. |
| 37 | VDD_4 | Power Supply | VDD | Power In | Main VDD power supply input. |
| 38 | P1.15 | GPIO | PB | Bi-Directional | General purpose I/O P1.15. |
| 39 | P0.03AIN1 | Analog | ADC | Bi-Directional | GPIO P0.03; SAADC analog input AIN1. |
| 40 | P0.02AIN0 | Analog | ADC | Bi-Directional | GPIO P0.02; SAADC analog input AIN0. |
| 41 | P0.28AIN4 | Analog | ADC | Bi-Directional | GPIO P0.28; SAADC analog input AIN4. |
| 42 | P0.29AIN5 | Analog | ADC | Bi-Directional | GPIO P0.29; SAADC analog input AIN5. |
| 43 | P0.30AIN6 | Analog | ADC | Bi-Directional | GPIO P0.30; SAADC analog input AIN6. |
| 44 | P0.31AIN7 | Analog | ADC | Bi-Directional | GPIO P0.31; SAADC analog input AIN7. |
| 45 | VSS_1 | Power Supply | VSS | Ground | Ground VSS. |
| 46 | DEC4 | Power Supply | Power | Power Out | 1.3 V regulator supply decoupling; connect/decouple with DEC6 per Nordic guidance. |
| 47 | DCC | Power Supply | Power | Power Out | DC/DC converter output node; connect external inductor/capacitors per Nordic reference circuit. |
| 48 | VDD_5 | Power Supply | VDD | Power In | Main VDD power supply input. |
| 49 | VSS_2 | Power Supply | VSS | Ground | Exposed die pad VSS; connect to ground for operation, thermal, and RF performance. |
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