Part Datasheet Review and Updates
EPAD → Ground and I2C_SDA/SCL → Bi-Directional; full details are in DS90UB953-Q1 Pin Functional Groups.https://www.ti.com/lit/gpn/ds90ub953-q1https://www.ti.com/lit/ds/symlink/ds90ub953-q1.pdfhttps://www.ti.com/product/DS90UB953-Q1/part-details/DS90UB953TRHBRQ1DS90UB953TRHBRQ1DS90UB953TRHBRQ1 / RHB32_TEXDS90UB953TRHBRQ1Texas InstrumentsUhttps://www.ti.com/lit/gpn/ds90ub953-q1RHB0032P.stpDS90UB953TRHBRQ1 DS90UB953TRHBRQ1_0_1 Symbol.svgRHB32_TEX.kicad_modEPAD with Pin Number 33.Table
| Pin | Datasheet / TI name | Flux terminal | Status | Notes |
|---|---|---|---|---|
| 1 | CSI_D1P | CSI_D1P | Match | CSI-2 data input |
| 2 | CSI_D1N | CSI_D1N | Match | CSI-2 data input |
| 3 | CSI_D0P | CSI_D0P | Match | CSI-2 data input |
| 4 | CSI_D0N | CSI_D0N | Match | CSI-2 data input |
| 5 | CSI_CLKP | CSI_CLKP | Match | CSI-2 clock input |
| 6 | CSI_CLKN | CSI_CLKN | Match | CSI-2 clock input |
| 7 | RES0 | RES0 | Match, property review needed | Reserved; TI notes connect to GND |
| 8 | PDB | PDB | Match | Power-down inverted input; not 3.3 V tolerant |
| 9 | LPF1 | LPF1 | Match, property mismatch | Existing Pin Type is Unspecified; should not remain unspecified |
| 10 | VDDPLL_CAP | VDDPLL_CAP | Match, property review needed | Internal regulator decoupling-cap connection |
| 11 | VDDPLL | VDDPLL | Match | 1.8 V analog PLL supply |
| 12 | LPF2 | LPF2 | Match, property mismatch | Existing Pin Type is Unspecified; should not remain unspecified |
| 13 | DOUT- | DOUT- | Match | FPD-Link III I/O, AC-coupled |
| 14 | DOUT+ | DOUT+ | Match | FPD-Link III I/O, AC-coupled |
| 15 | VDDDRV_CAP | VDDDRV_CAP | Match, property review needed | Internal regulator decoupling-cap connection |
| 16 | VDDDRV | VDDDRV | Match | 1.8 V analog supply |
| 17 | GPIO_0 | GPIO_0 | Match | GPIO / voltage-sense capable |
| 18 | GPIO_1 | GPIO_1 | Match | GPIO / voltage-sense capable |
| 19 | CLK_OUT/IDX | CLK_OUT/IDX | Match | I2C address / strap at startup, then CLK_OUT |
| 20 | CLKIN | CLKIN | Match | Reference clock input; may be open if unused |
| 21 | MODE | MODE | Match | Mode-select strap input |
| 22 | RES1 | RES1 | Match, property mismatch | TI notes reserved / do not connect / leave floating; existing Pin Type is Input |
| 23 | I2C_SDA | I2C_SDA | Match, property mismatch | I²C data, open-drain; existing Pin Type is Output |
| 24 | I2C_SCL | I2C_SCL | Match, property mismatch | I²C clock, open-drain; existing Pin Type is Output |
| 25 | VDDD | VDDD | Match | 1.8 V digital supply |
| 26 | VDDD_CAP | VDDD_CAP | Match, property review needed | Internal regulator decoupling-cap connection |
| 27 | GPIO_2 | GPIO_2 | Match | GPIO |
| 28 | GPIO_3 | GPIO_3 | Match | GPIO |
| 29 | CSI_D3P | CSI_D3P | Match | CSI-2 data input |
| 30 | CSI_D3N | CSI_D3N | Match | CSI-2 data input |
| 31 | CSI_D2P | CSI_D2P | Match | CSI-2 data input |
| 32 | CSI_D2N | CSI_D2N | Match | CSI-2 data input |
| DAP / exposed pad | GND / exposed thermal pad | EPAD, Pin Number 33 | Functional mismatch | EPAD should be treated as ground / exposed pad. Datasheet names it DAP/GND rather than a normal numbered pin. |
RHB32_TEX.kicad_mod is consistent with the TI RHB 32-pin VQFN package family.EPAD.RHB0032P.stp is consistent with the RHB0032 package naming.DS90UB953TRHBRQ1 / RHB32_TEXFPD-Link III serializer with 4-lane MIPI CSI-2 input, 4.16Gbps link, RHB-32 VQFN.Part Type: Serializer / Interface ICPackage or Case Code: VQFN-32 / RHB, 5 mm × 5 mmOperating Voltage: 1.8 VOperating Temperature: -40°C to +105°CEPAD, Pin Number 33, Pin Type UnspecifiedGround, description Exposed thermal pad, and consider whether Pin Number should remain 33 or use DAP depending on Flux part convention.RES1 is currently Input; TI notes it as reserved / do not connect / leave floating.Not Connected or equivalent, with description Reserved, leave floating.I2C_SDA and I2C_SCL are currently Output.Bi-Directional or Open Collector if supported by the part style.LPF1 and LPF2 are currently Unspecified.Passive is likely more useful than Unspecified for schematic clarity.VDDPLL_CAP, VDDDRV_CAP, and VDDD_CAP are currently Power In.Passive or a regulator-related power node depending on Flux ERC behavior.Pin Description, Section, Pin Group, and Pin Orientation metadata.EPAD, RES1, I²C open-drain pins, LPF pins, and internal regulator capacitor pins.Scope
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