```mermaid
flowchart TD
subgraph Power_Input [Power Input]
VIN[VM Input Connector]
GND_IN[GND Reference]
end
subgraph Logic_IO [Logic IO]
HDR[Logic Header]
AIN1_A[AIN1_A]
AIN2_A[AIN2_A]
BIN1_A[BIN1_A]
BIN2_A[BIN2_A]
AIN1_B[AIN1_B]
AIN2_B[AIN2_B]
BIN1_B[BIN1_B]
BIN2_B[BIN2_B]
NSLEEP[NSLEEP]
NFAULT[NFAULT]
VINT_IO[VINT]
end
subgraph Driver_A [DRV8833_A]
U1[DRV8833 A]
A_AOUT1[AOUT1_A]
A_AOUT2[AOUT2_A]
A_BOUT1[BOUT1_A]
A_BOUT2[BOUT2_A]
A_AISEN[AISEN_A]
A_BISEN[BISEN_A]
A_VINT[VINT_A]
A_VM[VM_A]
A_GND[GND_A]
end
subgraph Driver_B [DRV8833_B]
U2[DRV8833 B]
B_AOUT1[AOUT1_B]
B_AOUT2[AOUT2_B]
B_BOUT1[BOUT1_B]
B_BOUT2[BOUT2_B]
B_AISEN[AISEN_B]
B_BISEN[BISEN_B]
B_VINT[VINT_B]
B_VM[VM_B]
B_GND[GND_B]
end
subgraph Motors [Motor Outputs]
M1[M1 Connector]
M2[M2 Connector]
M3[M3 Connector]
M4[M4 Connector]
end
VIN --> A_VM
VIN --> B_VM
GND_IN --> A_GND
GND_IN --> B_GND
HDR --> AIN1_A
HDR --> AIN2_A
HDR --> BIN1_A
HDR --> BIN2_A
HDR --> AIN1_B
HDR --> AIN2_B
HDR --> BIN1_B
HDR --> BIN2_B
HDR --> NSLEEP
HDR --> NFAULT
HDR --> VINT_IO
NSLEEP --> U1
NSLEEP --> U2
NFAULT --> U1
NFAULT --> U2
VINT_IO --> A_VINT
VINT_IO --> B_VINT
A_AOUT1 --> M1
A_AOUT2 --> M1
A_BOUT1 --> M2
A_BOUT2 --> M2
B_AOUT1 --> M3
B_AOUT2 --> M3
B_BOUT1 --> M4
B_BOUT2 --> M4
A_AISEN --> GND_IN
A_BISEN --> GND_IN
B_AISEN --> GND_IN
B_BISEN --> GND_IN
```