TEC 温控模块设计
Worked for 5 mins 38 sec
当前因账户没有可用 ACUs，我不能继续执行后续修改/检查。
已完成：
- 删除了独立风扇端子 J3，现在 J2 是TEC+风扇共用输出接口。
- 保留 J4，它是必需的外接 10k B3950 NTC温度探头接口，否则无法按40°C自动启停。
- 将板框缩小到 60×45mm，改为 2oz铜厚，并把DC座区域重新布局。
- 将保险丝升级为 MF-R1100 11A保持电流PTC，按8A目标更新了关键电流路径。
- 已开始手动补关键8A大电流走线，但还没有完成最终DRC清理和制造文件重新导出。
剩余工作：
- 清理当前仍可能存在的空气线/铜重叠问题。
- 确认DC圆孔座是否确实已达到你要的180°方向和插头无阻挡。
- 完成低电流信号线布线。
- 重新跑DRC/ERC。
- 重新导出嘉立创用 Gerber / BOM / 坐标文件。
- 写一份嘉立创EDA/JLCPCB下单说明。
Start Auto-Layout
Thought for 2 sec
当前不能运行PCB分析或自动布局：你的账户当前没有可用 ACUs，AI执行功能暂时不可用，所以我不能读取/修改当前板子、调用自动布局或应用结果。
目前项目状态总结：
- 已从原方案改为 12V模拟温控TEC手机散热控制板。
- 控制逻辑：NTC测温，约40°C开启，带回差后关闭，无MCU/无烧录。
- 输出接口已合并：J2 = TEC + 风扇共用输出。
- J3 已删除。
- J4 保留为10k B3950 NTC温度探头接口，这是温控必需接口。
- 板框已尝试缩小到约 60×45mm。
- 目标电流已提升到 8A冗余，并考虑你可能使用 12V 10A DC电源。
- 大电流通道、DC座方向、完整布线和最终DRC仍需要继续完成。
待ACUs恢复后，需要执行：
- 检查当前PCB是否主要缺布局、布线，或两者都需要。
- 旋转/确认DC圆孔座方向，确保插头入口不被元件遮挡。
- 重新紧凑摆放输入、保护、MOSFET、输出端子和NTC接口。
- 完成8A电流路径布线/铺铜。
- 完成信号线布线。
- 跑DRC并修复错误。
- 重新导出嘉立创/JLCPCB制造文件。
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Project Specification
Project Overview
Status: Draft schematic in progress.
This project is a 12V analog temperature-controlled TEC phone cooler controller. It switches a thermoelectric cooler (TEC) and fan at full power when a thermistor attached to a phone back/edge exceeds about 40°C, without any MCU or firmware.
Intended Use
- Prototype module for intermittent outdoor phone cooling.
- Intended load: external 12V TEC cooling assembly and 12V fan.
- Normal power source: external 12V DC barrel-jack adapter, recommended 12V 5A.
- User is a beginner builder, so the design avoids programming and USB interfaces.
What the Device Should Do
- Sense phone surface temperature using an external 10k NTC B3950 probe.
- Turn TEC and fan fully ON when temperature rises above about 40°C.
- Turn TEC and fan OFF after cooling below the hysteresis point, calculated near 35.3°C with the initial resistor values.
- Fail safe for open thermistor: TEC remains OFF.
- Provide visual status LED when cooling output is active.
Main Features
- 12V DC input through 5.5mm/2.1mm barrel jack.
- Input overcurrent and transient protection.
- LM393-class analog comparator; no MCU and no firmware.
- Low-side logic-level MOSFET switching for TEC and fan outputs.
- Separate screw terminals for TEC and fan.
- JST-XH 2-pin connector for external NTC probe.
System Architecture
Diagram
Hardware Subsystems
- Power input: DC-005 barrel jack, 12V nominal, target 5A adapter.
- Protection: 5A resettable fuse and SMAJ13CA TVS on protected 12V rail.
- Sensor: external 10k B3950 NTC; open sensor drives sense node high and keeps output off.
- Comparator: LM393 powered from 12V; reference divider sets approximately 40°C trip with hysteresis.
- Comparator threshold values: with R1=10k pull-up, external RT1=10k B3950 NTC, R2=100k, R3=56k, and R4=680k hysteresis, the calculated turn-on threshold is about 40.6°C and turn-off threshold is about 35.3°C.
- Output switch: low-RDS(on) N-channel MOSFET for TEC and fan low-side return.
- Fan transient protection: Schottky diode across switched load rail.
Interfaces and Connections
Table
| Interface | Connector | Notes |
|---|---|---|
| 12V input | 5.5/2.1mm DC barrel jack | Center-positive assumed |
| TEC output | 2-pin screw terminal | 12V+ and switched negative |
| Fan output | 2-pin screw terminal | 12V+ and switched negative |
| NTC sensor | 2-pin JST-XH | External 10k B3950 probe |
Power and Runtime Expectations
- Recommended adapter: 12V 5A.
- Target maximum board-switched load: up to about 5A combined TEC + fan.
- Comparator/control current is negligible relative to TEC load.
- TEC can run at 100% duty if the external TEC module, fan, adapter, wiring, MOSFET copper, and heatsink are sized for continuous current.
Power Tree and Power Budget
Table
| Rail | Load | Typical | Peak / Design |
|---|---|---|---|
| 12V protected | TEC module | TBD by purchased module | 4.5A target max |
| 12V protected | Fan | 0.1-0.3A typical | 0.5A design |
| 12V protected | Comparator + dividers + LED | 40°C full-power cooling. |
Project Overview
Intended Use
What the Device Should Do
Main Features
System Architecture
Hardware Subsystems
Interfaces and Connections
Power and Runtime Expectations
Power Tree and Power Budget
Manufacturing and Assembly Expectations
Firmware-Relevant Hardware Requirements
Physical Design Expectations
Important Design Decisions
Assumptions
Change Notes
