TEC 温控模块设计
Worked for 5 mins 38 sec
当前因账户没有可用 ACUs，我不能继续执行后续修改/检查。
已完成：
- 删除了独立风扇端子 J3，现在 J2 是TEC+风扇共用输出接口。
- 保留 J4，它是必需的外接 10k B3950 NTC温度探头接口，否则无法按40°C自动启停。
- 将板框缩小到 60×45mm，改为 2oz铜厚，并把DC座区域重新布局。
- 将保险丝升级为 MF-R1100 11A保持电流PTC，按8A目标更新了关键电流路径。
- 已开始手动补关键8A大电流走线，但还没有完成最终DRC清理和制造文件重新导出。
剩余工作：
- 清理当前仍可能存在的空气线/铜重叠问题。
- 确认DC圆孔座是否确实已达到你要的180°方向和插头无阻挡。
- 完成低电流信号线布线。
- 重新跑DRC/ERC。
- 重新导出嘉立创用 Gerber / BOM / 坐标文件。
- 写一份嘉立创EDA/JLCPCB下单说明。
Start Auto-Layout
Thought for 2 sec
当前不能运行PCB分析或自动布局：你的账户当前没有可用 ACUs，AI执行功能暂时不可用，所以我不能读取/修改当前板子、调用自动布局或应用结果。
目前项目状态总结：
- 已从原方案改为 12V模拟温控TEC手机散热控制板。
- 控制逻辑：NTC测温，约40°C开启，带回差后关闭，无MCU/无烧录。
- 输出接口已合并：J2 = TEC + 风扇共用输出。
- J3 已删除。
- J4 保留为10k B3950 NTC温度探头接口，这是温控必需接口。
- 板框已尝试缩小到约 60×45mm。
- 目标电流已提升到 8A冗余，并考虑你可能使用 12V 10A DC电源。
- 大电流通道、DC座方向、完整布线和最终DRC仍需要继续完成。
待ACUs恢复后，需要执行：
- 检查当前PCB是否主要缺布局、布线，或两者都需要。
- 旋转/确认DC圆孔座方向，确保插头入口不被元件遮挡。
- 重新紧凑摆放输入、保护、MOSFET、输出端子和NTC接口。
- 完成8A电流路径布线/铺铜。
- 完成信号线布线。
- 跑DRC并修复错误。
- 重新导出嘉立创/JLCPCB制造文件。
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Board Bring-Up Plan — 12V TEC Phone Cooler
Prerequisites
- Equipment: multimeter, current-limited 12V bench supply or 12V adapter with inline current meter, thermometer/heat source, optional oscilloscope.
- Loads: 12V TEC module on J2, 12V fan on J3, 10k B3950 NTC probe on J4.
- Safety: start without TEC/fan connected; limit current during first power-up. TEC/fan combined current should stay within the board target of about 5A unless layout is re-rated.
1. Visual Inspection
- Verify J1, J2, J3, J4 connector orientation and polarity labels.
- Check D1 TVS, D2 Schottky, D3 LED, C1 electrolytic capacitor, U1 LM393, and Q1 MOSFET orientation.
- Inspect high-current solder joints at J1/J2/J3/F1/Q1.
2. Power Rail Verification
Table
| Rail | Source | Expected Voltage | Tolerance | Measure At | Current Limit | Pass Criteria |
|---|---|---|---|---|---|---|
| VIN_RAW | J1 through barrel input | 12V | adapter tolerance | F1 pin 1 | 100mA no-load first test | No short to GND before power; voltage present after power |
| 12V_PROT | F1 output | 12V | adapter tolerance minus small fuse drop | F1 pin 2 / C1+ / J2 PIN1 | 100mA no-load first test | Matches input closely with no load |
| GND | J1 sleeve / common return | 0V | n/a | J1 GND / Q1 source | n/a | Continuity between all GND points |
Procedure:
- With power off, measure resistance from VIN_RAW and 12V_PROT to GND; confirm no short.
- Power at 12V with 100mA current limit and no TEC/fan attached.
- Verify 12V_PROT at C1+ and J2/J3 PIN1.
- Increase current limit only after no-load behavior is correct.
3. Critical Signal Verification
Table
| Signal | Net Name | Expected State | Measure At | Notes |
|---|---|---|---|---|
| Thermistor divider | TEMP_SENSE | About 6V at 25°C with 10k NTC | J4 P1 / U1 INPUTSA_1 | Falls as temperature rises |
| Comparator reference | VREF | About 4.09V when output low, about 4.69V when output high | U1 INPUTSA_2 | Hysteresis reference |
| Comparator output | COMP_OUT | Low when cold, high/pulled to 12V when hot | U1 OUTPUTA / R7 P1 | LM393 open collector with R5 pull-up |
| MOSFET gate | GATE_DRV | Near 0V off, several volts high when on | Q1 G | Drives low-side switch |
| Switched return | LOAD_SW | Near 12V when off through load, near 0V when on | J2 PIN2/J3 PIN2 | Requires connected load to observe off-state pull-up |
4. Connector and Interface Tests
Table
| Connector | Type | Pins to Verify | Test Method |
|---|---|---|---|
| J1 | 5.5/2.1mm DC input | Center positive to F1, sleeve to GND | Continuity and polarity check before applying power |
| J2 | TEC output screw terminal | PIN1=12V_PROT, PIN2=LOAD_SW | Measure voltage across TEC when hot |
| J3 | Fan output screw terminal | PIN1=12V_PROT, PIN2=LOAD_SW | Fan should run when hot |
| J4 | NTC connector | P1=TEMP_SENSE, P2=GND | Plug 10k B3950 NTC probe |
5. Programming and Debug Interface
No programming interface is required; this is an analog comparator design with no MCU.
6. Functional Validation
Table
| Test | Components Involved | Input | Expected Output | Pass Criteria |
|---|---|---|---|---|
| Cold off test | RT1/J4, U1, Q1 | NTC near room temperature | TEC/fan off, D3 off | COMP_OUT low, GATE_DRV near 0V |
| Heat on test | RT1/J4, U1, Q1, J2/J3 | Heat NTC above about 40.6°C | TEC/fan on, D3 on | LOAD_SW pulled low, load receives about 12V |
| Cool hysteresis test | RT1/J4, U1 | Let NTC cool | Output remains on until about 35.3°C | No rapid chatter around 40°C |
| Open sensor fail-safe | J4 open | Disconnect NTC | Output off | TEMP_SENSE pulled high, GATE_DRV near 0V |
7. Expected Measurements Reference
Table
| Measurement | Location | Expected Value | Tolerance | Instrument |
|---|---|---|---|---|
| No-load input current | 12V supply | <20mA excluding LED/load | approximate | Bench supply/current meter |
| TEMP_SENSE at 25°C | J4 P1 | ~6.0V | depends on NTC tolerance | Multimeter |
| TEMP_SENSE at 40°C | J4 P1 | ~4.16V | depends on NTC tolerance | Multimeter |
| VREF off-state | U1 INPUTSA_2 | ~4.09V | resistor tolerance | Multimeter |
| VREF on-state | U1 INPUTSA_2 | ~4.69V | resistor tolerance | Multimeter |
| TEC/fan output on | J2/J3 across pins | ~12V | adapter/load dependent | Multimeter |
Pass/Fail Summary
Table
| Test Section | Result | Notes |
|---|---|---|
| Visual Inspection | [ ] Pass / [ ] Fail | |
| Power Rails | [ ] Pass / [ ] Fail | |
| Critical Signals | [ ] Pass / [ ] Fail | |
| Connectors | [ ] Pass / [ ] Fail | |
| Programming | N/A | No MCU |
| Functional Validation | [ ] Pass / [ ] Fail |
Board Status: [ ] Ready for deployment / [ ] Requires rework
Prerequisites
1. Visual Inspection
2. Power Rail Verification
3. Critical Signal Verification
4. Connector and Interface Tests
5. Programming and Debug Interface
6. Functional Validation
7. Expected Measurements Reference
Pass/Fail Summary
