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Explaining circuit design.

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Using Schematic Tool.

Using Knowledge Base Tool.

Looking for "device overview description functions" in tps25751.pdf

Looking for "device overview description functions power path NTC TS" in bq25895.pdf

Looking for "device overview description functions" in DW01A.PDF

Looking for "overview LED outputs description fuel gauge" in MAX17263.pdf

Looking for "overview description output 5V feedback FB equation" in suppproductinfo.tsp?distId=10&gotoUrl=https%3A%2F%2Fwww.ti.com%2Flit%2Fgpn%2Ftps61023

Looking for "overview description DPWM BUZ BPCAP V33A V33D supply requirements" in bq500211a.pdf

Looking for "overview description HO LO VB VS VCC COM input control" in Download-ISO9001-Certification.pdf

Looking for "overview description MOSFET role gate charge package" in 2410010202_Texas-Instruments-CSD17302Q5A_C553151.pdf

Looking for "overview description USB-C receptacle pin names" in 202410002_Pkg_Spec.pdf

Searching web for: "TLV70033 datasheet PDF Texas Instruments"

Found 1 results.

Searching web for: "IR2104 datasheet PDF"

Found 1 results.

Looking for "Overview description pin descriptions VCC IN HO LO VB VS COM input requirements" in IR2104_InternationalRectifier.pdf

Looking for "Overview features description output voltage fixed 3.3V variant TLV70033 decoupling recommendations input and output capacitors" in tlv700

Looking for "Overview description fixed output versions TLV70033 3.3 V decoupling input output capacitor requirements" in tlv700.pdf

Summarizing components and connections.

Drafting without diagrams.

Below is a concise, block-by-block explanation of how your wireless power bank schematic works, how each component is connected, and why each connection is important. I also call out two miswirings that must be corrected for the Qi/H-bridge section to function.
USB-C PD input and front-end
  • Connector: J1
    • Key nets: VBUS, GND, CC1, CC2, shields.
    • Purpose: Physical USB-C receptacle that brings in power and CC pins.
  • PD controller: IC1 (TI TPS25751)
    • CC1/CC2 go to the PD controller for role detection/PD negotiation.
    • VBUS is sensed/managed by the PD controller.
    • Why important (datasheet): TPS25751 is a fully integrated USB-PD management device that handles Type‑C cable orientation, PD communication, and power path control (USB-PD PHY, CC orientation detect, power switches, power management, digital core, I2C control to external targets).
  • CC configuration resistors: R2, R3
    • Nets: R2 ties to CC1; R3 ties to CC2.
    • Purpose: Provide the correct Rd/Rp behavior for Type‑C attach/orientation. Ensures the PD controller can properly detect and negotiate the source.
  • Input EMI/decoupling: L5 (MGFL2012F100MT-LF) in series with VBUS and C12 to ground
    • Nets: VBUS from J1 passes through L5; C12 shunts HF noise to GND.
    • Purpose: EMI filtering and supply decoupling at the connector.
Charger and power-path (single-cell Li-ion)
  • Charger/power-path: U2 (TI BQ25895)
    • Key pins/nets: VBUS (input), SYS (system rail), BAT (battery), TS (thermistor), PGND/GND.
    • Why important (datasheet): BQ25895 implements NVDC power-path management to seamlessly power the system from VBUS and/or BAT, supports instant-on with depleted cells, and uses TS with an NTC window to qualify safe charging.
  • NTC/TS divider: R1 to TS
    • Nets: TS connects to U2 TS pin and R1.
    • Purpose: Implements the thermistor divider so the charger can monitor battery temperature and suspend charging outside safe ranges (per BQ25895 TS/NTC guidance).
  • Decoupling on U2/SYS/VBUS: examples include C13 (SYS), C12 (VBUS).
    • Purpose: Local bypass to reduce ripple and ensure stability around the charger’s power pins.
Battery protection and gauging
  • Protection IC: U3 (DW01A)
    • Nets: BAT domain (VCC) and sense pins.
    • Why important (datasheet): Provides cell protection (overcharge, overdischarge, overcurrent/short). Protects the Li-ion cell and system.
  • Fuel gauge and LED driver: U5 (MAX17263)
    • Nets: BATT sense; I2C (SDA/SCL) to system; L1–L4 LED drive nets.
    • Why important (datasheet): ModelGauge m5 fuel gauge; drives 3–12 LEDs for SOC indication. Your design uses four outputs (L1–L4).
LED indicators (four channels)
  • LEDs: D1, D2, D3, D4
  • Series resistors: R6, R7, R8, R9
    • Nets: L1->[R6]->[D1]->GND; L2->[R7]->[D2]->GND; L3->[R8]->[D3]->GND; L4->[R9]->[D4]->GND.
    • Purpose: Visual SOC/status. Series resistors limit LED current; best-practice to size per LED Vf and rail. Your values are in the typical range for indicator brightness.
Boost converter to 5 V rail (PP5V) for Qi section
  • Boost IC: U6 (TI TPS61023)
    • Nets: VIN from SYS; VOUT to PP5V; FB network R12/R13 with C17 to GND; EN (Net 1).
    • Why important (datasheet): Output is set by FB divider; Equation VOUT = VREF × (1 + R12/R13). Internal compensation but requires correct divider and good layout for stability.
  • Input/output bypass: e.g., C14 at VIN, PP5V bulk/ceramics near the load.
    • Purpose: Maintain stability, limit ripple, and supply transient current to the Qi/H-bridge.
3.3 V LDO for Qi controller and driver logic
  • LDO: U7 (TLV70033)
    • Nets: IN from PP5V; OUT intended to the 3V3 rail; EN pin available; GND to GND.
    • Decoupling: R10 and R11 are placed as input/output “decoupling” but are currently typed as resistors; these should be capacitors per LDO datasheet.
    • Why important (datasheet): TLV700 series recommends 1 µF ceramic at IN and 1 µF at OUT (X5R/X7R), with effective COUT ≥ 0.1 µF and ESR < 200 mΩ, for stability and transient response. It provides a regulated 3.3 V rail for the Qi controller analog/digital supplies and the gate driver logic VCC.
    • Connection to 3V3: The 3V3 net currently feeds U4 V33A and U8 VCC via C15/C16, but I do not see U7 OUT actually tied to the 3V3 net in this snapshot. Functionally, U7 OUT must drive the 3V3 net.
Qi transmitter controller, full-bridge driver, and MOSFETs
  • Qi controller: U4 (TI BQ500211A)
    • Supplies: V33D (digital) and V33A (analog) should each be at 3.3 V per datasheet. V33A should be derived from V33D through a small resistor and extra decoupling. Both need local bypass.
    • Control outputs: DPWM_A and DPWM_B are PWM outputs for the two bridge halves; deadtime must be generated externally per datasheet. BUZ_AC/BUZ_DC provide buzzer/LED indication pulses.
    • BPCAP: Bypass for internal 1.8 V core regulator; must connect to a local capacitor to GND.
    • Current snapshot notes (from connectivity):
      • DPWM_A -> U8 IN is correct (drives gate driver logic).
      • V33A and 3V3 rails are present; ensure V33D also powered and decoupled per datasheet.
      • BPCAP is currently net-tied to U8 VB. Per the BQ500211A datasheet, BPCAP must be bypassed to GND, not tied to a bootstrap pin. This connection must be corrected.
  • Gate driver: U8 (IR2104)
    • Pins (datasheet): IN (logic control), LO (low-side gate out), HO (high-side gate out), VCC (logic/low-side supply ~10–20 V typical), COM (logic ground), VB (high-side bootstrap supply), VS (high-side return/switch node).
    • Nets in your design: HO -> HS_GATE driving Q1/Q3 gates; LO -> LS_GATE driving Q2/Q4 gates. VCC is on 3V3 here.
    • Important constraints (datasheet): IR2104 is a high/low-side driver intended to run with VCC around 10–20 V and bootstrap VB ~VCC above VS. Using 3.3 V on VCC will not be within recommended operating conditions. Also, VS must connect to the switching node (half-bridge midpoint).
    • Current snapshot notes:
      • VS is net-tied to U4 BUZ_AC (BUZ_AC -> VS). Per datasheet, VS must be the switch node, not a logic/buzzer output. This is a misconnection that must be fixed.
      • VCC currently from 3V3: this is below the IR2104 recommended VCC (10–20 V). Either select a logic-level half-bridge driver that supports 3.3 V, or provide a proper driver supply per datasheet.
  • MOSFETs (full bridge): Q1, Q2, Q3, Q4 (TI CSD17302Q5A)
    • Gates: HS_GATE to high-side gates, LS_GATE to low-side gates from U8.
    • Role (datasheet): Low Qg FET optimized for 5 V gate drive; used as the switching H-bridge devices to drive the Qi primary coil.
    • Importance: These form the power stage for the Qi transmitter. Correct deadtime, bootstrap, VS node wiring, and proper driver supply voltage are critical to avoid shoot-through and ensure efficiency.
Power rails and decoupling
  • Rails and naming:
    • VBUS: from J1 through L5, decoupled by C12.
    • SYS: from U2 power-path; feeds U6 VIN.
    • PP5V: from U6 VOUT; intended to feed U7 IN and Qi section.
    • 3V3: intended from U7 OUT to U4 V33A/V33D and U8 VCC; ensure U7 OUT is explicitly tied to net 3V3.
  • General decoupling capacitors (examples):
    • C1, C2, C3, C4, C5, C6, C7, C8, C9, C10, C11, C13, C14, C15, C16, C17
    • Purpose: Provide local high-frequency bypass on each IC supply and on critical nets (VBUS, SYS, PP5V, 3V3, FB network). This reduces noise and stabilizes control loops.
Two items that must be corrected (per datasheets)
  • U4 BPCAP connection:
    • Datasheet: BPCAP is a bypass capacitor for the internal 1.8 V core regulator and must connect to GND.
    • Current net: BPCAP is tied to U8 VB. This is incorrect and must be rewired to a capacitor-to-GND near U4.
  • U8 driver supply and VS node:
    • Datasheet: U8 VCC should be ~10–20 V; VB is bootstrap; VS is the half-bridge switch node (return for HO).
    • Current nets: VCC is on 3V3 (out of spec). VS is tied to BUZ_AC (incorrect, BUZ_AC is a logic/indication output from U4).
    • Action: Either select a gate driver compatible with 3.3 V logic supply for a 5 V (or appropriate) gate drive, or add a proper driver supply. Rewire VS to the H-bridge midpoint node, and wire VB with a bootstrap cap to VS per driver datasheet.
Why each block matters
  • USB-C PD/Type‑C: Negotiates safe input power and orientation so the system can be powered and charged correctly.
  • Charger/power-path: Safely charges the Li‑Po while powering the system from VBUS and/or battery, with thermal qualification via TS.
  • Protection: Prevents damage from over/under‑voltage and overcurrent events at the cell.
  • Fuel gauge + LEDs: Reports accurate SOC and user feedback on charge level.
  • Boost to PP5V: Provides a regulated 5 V rail for the Qi transmitter power stage.
  • 3.3 V LDO: Creates a quiet logic/analog rail for the Qi controller and the gate driver logic supply (or an alternative driver), with proper decoupling per LDO datasheet.
  • Qi controller + H‑bridge: Generates the controlled AC drive for the transmitter coil; correct supply, timing, and half‑bridge wiring are critical for efficiency and reliability.
Would you like me to fix the two miswirings (BPCAP and IR2104 VCC/VS/VB wiring and supply) and tie U7 OUT explicitly to 3V3 so the Qi section is fully functional?
a day

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wireless power bank

wireless power bank
Description

Created
1 Contributor(s)
zuhour

Controls

Properties

connection_violations
decoupling_nets
5V, GND, CC2, CC1, BAT, TS, VBUS
active_rating_violations
U4
Domain
Consumer Electronics
erc_issues
[]
System Architecture
```mermaid flowchart TD USB_C[USB-C Input] CC[CC Resistors] PD[PD Controller] EFUSE[eFuse/OVP] CHG[Charger IC] BAT[LiPo Battery] BOOST[Boost Converter] QI[Qi TX Module] MCU[Fuel Gauge MCU] NTC[NTC Thermistor] LED[LED Indicator] USB_C --> CC CC --> PD PD --> EFUSE EFUSE --> CHG CHG --> BAT BAT --> CHG CHG --> BOOST BOOST --> QI CHG --> NTC CHG --> MCU MCU --> LED ```
pending_changes
Add 3.3 V LDO for U4; Add MOSFET gate driver full-bridge for U4; Add LED series resistors; Adjust TPS61023 FB network
layout_violations
Connectivity
USB
Power Requirements
USB
Power Source
Battery
Manufacturing Quantity Target
10
drc_issues
[]
capacitor_violations
missing_footprints_non_generic
[]
resistor_violations

Availability & Pricing

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