Document Review and Assistance
Worked for 24 mins 43 sec
I’m blocked now because the account has no available ACUs, so I can’t run the final post-route DRC/airwire verification.
Accomplished this session:
- Ran pre-route validation: board was routable with 51 PCB components / 47 nets.
- Auto-routed the board, adding 880 routing nodes.
- Found post-route issues: 2 airwires and 4 overlapping-copper errors, localized mainly around C15 GND plus GND connectivity near U9/U5.
- Removed two conflicting trace segments and ran one cleanup auto-route pass, adding 9 routing nodes.
Open items:
- Final DRC/airwire check still needs to be run once ACUs are available.
- If errors remain, inspect C15 GND pad / bulk capacitor footprint area first.
- Low-noise analog routing should be visually reviewed before fabrication, especially sensor → LMP91000 → ADC paths and the 2.5 V reference routing.
Suggested next steps:
- Re-run full post-route DRC and airwire checks.
- Fix any remaining localized C15/GND overlap issues.
- Review analog/reference routing quality manually before generating manufacturing files.
Run final checks
Fix C15 GND
Review analog routing
Check ground returns
Checks and cleanup
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SNAU121A / LMP91000EVM Implementation Notes
Scope
This project implements a four-channel electrochemical gas sensor analog front-end based on the TI SNAU121A / LMP91000EVM architecture.
Implemented Architecture
- 4× LMP91000 AFE channels: U1, U2, U3, U4
- 4× SPI ADC placeholders: U5, U6, U7, U8
- Shared 2.5 V voltage reference: U9 LM4125AIM5-2.5
- Shared I2C bus: I2C_SDA, I2C_SCL
- Shared SPI clock/data: SPI_SCLK, SPI_MISO
- Per-channel ADC chip-select nets: CH1_ADC_CS, CH2_ADC_CS, CH3_ADC_CS, CH4_ADC_CS
- Per-channel sensor connectors: J2, J3, J4, J5
- Controller/header interface: J1
- 3.3 V supply rail and common GND
- Per-IC decoupling, bulk capacitance, and test points for key rails/signals
Important Library Substitutions / Assumptions
- ADC substitution: The SNAU121A reference design uses ADC161S626. That exact device was not available in the Flux library during implementation, so ADS7866 was used as a schematic placeholder for the SPI ADC function. Before fabrication, replace or verify this ADC choice for:
- input voltage range and reference behavior,
- SPI timing and mode compatibility,
- pinout and footprint,
- resolution/sample-rate requirements.
- Voltage reference: LM4125AIM5-2.5 is used as the available 2.5 V reference implementation.
- LMP91000 address pins: The available LMP91000 symbol did not expose ADDR0/ADDR1 pins. If the actual package/symbol used for PCB fabrication exposes address-select pins, set unique I2C addresses per channel or provide address selection jumpers.
- DNP parts: Several compensation/filter component positions are marked DNP to preserve the configurable EVM-style topology.
- Controller interface: J1 is intended to connect to an external STM32F767ZI or similar 3.3 V host providing I2C, SPI SCLK, ADC chip selects, and reading SPI MISO.
Review Status
Design checks run on 2026-06-24 reported no open errors or warnings for the checked ERC, component review, and manufacturing-footprint categories.
Pre-Fabrication Checklist
- Replace ADS7866 placeholders with the intended ADC161S626 or explicitly approve ADS7866 after datasheet comparison.
- Confirm all generic passives have the desired footprint, tolerance, voltage rating, and DNP/populated status.
- Confirm each LMP91000 has a unique usable I2C address in the final symbol/package implementation.
- Confirm sensor connector pinout matches the intended electrochemical sensor wiring: CE, RE, WE.
- Confirm the external controller pin mapping for J1 before layout/routing.
- Run full schematic/ERC review again after any ADC or connector changes.
Scope
Implemented Architecture
Important Library Substitutions / Assumptions
Review Status
Pre-Fabrication Checklist
