Here’s a complete execution of your 4-step request for this part project.
Step 1 — Available part information in the project
- Manufacturer: u-blox
- MPN: NINA-B302-00B-00
- Description: BLUETOOTH LOW ENERGY STAND-ALONE
- Package/footprint asset: NINAB30200B00.kicad_mod (module outline 15.0 mm x 10.0 mm per footprint data)
- Pin count in project assets:
- Numbered signal pads: 1–55
- Additional exposed ground pads: G1–G12 (12 inner ground pads)
- Total pads present in the footprint: 67 (55 + 12)
- Datasheet property: Present
Step 2 — Datasheet URL presence
- The Datasheet property is already set to the official u-blox document. No update required.
Step 3 — Datasheet metadata (extracted and summarized)
Absolute Maximum Ratings (datasheet)
- VCC (module supply voltage): Min -0.3 V, Max 3.9 V
- V_DIO (digital pin voltage):
- If VCC ≤ 3.6 V: Min -0.3 V, Max VCC + 0.3 V
- If VCC > 3.6 V: Min -0.3 V, Max 3.9 V
- P_ANT (maximum input RF power at ANT): +10 dBm
Recommended Operating Conditions (datasheet)
- Operating temperature: -40 to +85 C
- Storage temperature: -40 to +125 C
- VCC (input supply voltage): Min 1.7 V, Typ 3.3 V, Max 3.6 V
- t_RVCC (supply rise time): Max 60 ms
- VCC_IO (I/O reference voltage): VCC
- VCC ripple specs are listed but TBD in several bands
Electrical Characteristics (current consumption, VCC rail; typicals, datasheet)
- Sleep (no clocks, no RAM retention): 400 nA
- Sleep (no clocks, 64 kB RAM retention): 880 nA
- Sleep (no clocks, 256 kB RAM retention): 2.3 µA
- Standby (RTC + 64 kB RAM retention, 32.768 kHz crystal): 1.3 µA
- Active (CPU @ 64 MHz, ifaces idle): 3.6 mA
- Active (Radio RX): 4.8 mA
- Active (Radio TX, 0 dBm): 4.9 mA
- Active (Radio TX, +8 dBm): 14.1 mA
- Active (CPU @ 64 MHz + Radio TX 0 dBm): 9.1 mA
Digital I/O thresholds (datasheet)
- VIH (input high): Min 0.7 × VCC
- VIL (input low): Max 0.3 × VCC
Package/mechanical dimensions (datasheet: NINA‑B3x2, which includes B302)
- Length: 15.0 mm (+0.20 / -0.10 mm)
- Width: 10.0 mm (+0.20 / -0.10 mm)
- Thickness (representative series value): 2.23 mm (typ)
- Recommended land pattern key dimensions (representative):
- Lateral/outer pin pitch: 1.00 mm
- Outer/antenna row pad width: 0.70 mm
- Outer/antenna row pad length: 1.15 mm
- Inner/central pad width/length: 0.70 mm (central grid)
- Inner row pitch examples: 1.10–1.15 mm (per table entries)
Pinout highlights (datasheet, selected key pins)
- Power and reset
- 9 VCC_IO
- 10 VCC
- GND pins: 6, 12, 14, 26, 30, 53
- 19 RESET_N
- Debug
- USB
- 54 USB_DP
- 55 USB_DM
- 31 VBUS
- QSPI
- 47 QSPI_D3/GPIO_47
- 48 QSPI_D1/GPIO_48
- 49 QSPI_D2/GPIO_49
- 50 QSPI_D0/GPIO_50
- 51 QSPI_CS/GPIO_51
- 52 QSPI_CLK/GPIO_52
- NFC
- 28 NFC1/GPIO_28
- 29 NFC2/GPIO_29
- Antenna
- 13 ANT (see note below for B302 variant)
Special features (datasheet, series and B302 specifics)
- Bluetooth Low Energy 5 (multi-phy: 1 Mbps, 2 Mbps, 500 kbps, 125 kbps)
- Nordic nRF52840-based, Arm Cortex-M4F MCU
- Integrated internal metal PIFA antenna for NINA-B302 (B3x2 family)
- For B3x2 (includes NINA-B302), the ANT pin is internally disconnected from the RF path
- NFC available; USB device supported; QSPI interface present
- Typical conducted TX +8 dBm; EIRP +10 dBm (series figures); RX sensitivity around -94 dBm (conducted, series figures)
Step 4 — Cross-check: schematic symbol and footprint vs datasheet
Summary: The mapping of pin numbers 1–55 appears consistent with the datasheet, the footprint geometry matches the recommended land pattern dimensions (pitch 1.00 mm, pad size 0.70 × 1.15 mm), and mechanical outline is consistent with 15.0 mm × 10.0 mm for the B3x2 family. A few naming inconsistencies and a variant-specific antenna nuance should be addressed.
Symbol pin naming/numbering cross-check
- Present and correct (spot-checked against datasheet):
- GPIO_1 (1), GPIO_2 (2), GPIO_3 (3), GPIO_4 (4), GPIO_5 (5)
- Grounds: GND_1 (6), GND_2 (12), GND_3 (14), GND_4 (26), GND_5 (30), GND_6 (53)
- Debug and reset: SWDCLK (11), SWDIO (15), RESET_N (19)
- Power: VCC_IO (9), VCC (10), VBUS (31)
- USB: USB_DP (54), USB_DM (55)
- QSPI: QSPI_D3/GPIO_47 (47), QSPI_D1_/GPIO_48 (48), QSPI_D2/GPIO_49 (49), QSPI_D0/GPIO_50 (50), QSPI_CS/GPIO_51 (51), QSPI_CLK/GPIO_52 (52)
- NFC: NFC1_/GPIO_28 (28), NFC2/GPIO_29 (29)
- Naming inconsistencies to fix for datasheet alignment:
- Variant-specific antenna note (important):
- ANT is shown as a pin (13). For NINA‑B302 (B3x2 family), the ANT pin is internally disconnected from the RF path (module has built-in metal PIFA). Exposing ANT as a connectable I/O in the symbol can mislead a design to route RF that is non-functional.
- Recommended action: change ANT pin type to “Not Connected” and annotate “NC on NINA‑B302 (B3x2)”. Optionally hide it in the symbol.
Footprint cross-check (geometry and pins)
- Footprint source: NINAB30200B00.kicad_mod
- Numbered pads present: 1–55, central ground pads G1–G12 present (total 67 pads)
- Pad sizes in footprint:
- Perimeter pads: 0.70 mm × 1.15 mm (matches datasheet recommended values)
- Central ground array pads: 0.70 mm × 0.70 mm (consistent with inner pad guidance)
- Pin pitch: 1.00 mm for outer rows (matches datasheet)
- Module outline in F.Fab: 15.0 mm × 10.0 mm (matches datasheet B3x2 dimensions)
- Orientation: Pin-1 marker is present on the top-left; perimeter pad numbering and side ordering look consistent with datasheet illustrations.
- No mismatches found that would cause assembly issues when following this footprint. Presence of inner G pads (G1–G12) is consistent with exposed ground pad arrays used for thermal/RF grounding. Keep them tied to ground in board usage.
Potential risks / corrections to prevent issues
- Symbol naming cleanup: rename the three pins noted above to match datasheet (avoid underscores that are not in the official names).
- Antenna pin handling for B302:
- ANT should not be used or routed on NINA‑B302 (B3x2 internal antenna). Mark as NC or hide. Leaving it as an I/O could prompt erroneous RF routing.
- Inner ground pads:
- The G1–G12 pad naming is a library convention (datasheet labels these collectively as exposed ground pads, not individual “Gx” numbers). This is fine, but be sure they are declared as Ground/Power pads to encourage correct net assignment during schematic use.
If you want, I can apply the symbol pin renames and update the ANT pin type/annotation for this part.