I can’t execute project edits or run component/datasheet checks right now because execution credits are unavailable. No schematic changes have been made yet; the project is still empty.
Architectural guidance from your specs:
3.3 V regulator topology
Use a buck DC-DC converter, not an LDO, from the LiPo input to 3.3 V.
Input range should cover at least 6.0–18 V, preferably 24 V or higher for transient margin.
An LDO from 16.8 V to 3.3 V would dissipate (16.8 - 3.3) × I, which is inefficient and thermally risky even at modest MCU/peripheral current.
Recommended architecture:
XT30 battery input
Fuse or resettable protection
Reverse-polarity protection or ideal-diode MOSFET
TVS diode rated for LiPo transient protection
Buck converter to 3.3 V
Local STM32 decoupling: 100 nF per VDD pin, plus 1–4.7 µF bulk near MCU
MOSFET voltage rating check
AO3401A P-channel MOSFET is commonly rated around -30 V Vds, so 16.8 V battery voltage is likely acceptable for Vds margin.
Its Vgs rating is typically ±12 V or ±20 V depending on exact variant/vendor, so this must be confirmed from the exact datasheet. If the gate is pulled from battery to ground, Vgs can approach -16.8 V, which may exceed a ±12 V device rating.
Add a gate-source Zener clamp, typically 10–12 V, across AO3401A gate-source if battery voltage can exceed the MOSFET’s Vgs limit.
AON6324 N-channel MOSFET variants are typically rated well above 16.8 V Vds, often 30 V class or higher, but the exact datasheet must be verified.
For coil switching, Vds rating alone is not enough. You also need:
Coil flyback path/clamp
Avalanche/current rating margin
Thermal/current sharing checks for the two parallel MOSFETs
Very low-inductance layout
S8050 / AO3401A resistor value guidance
STM32 MAG → S8050 base:
Use 1 kΩ to 2.2 kΩ base resistor as a starting range.
1 kΩ gives roughly (3.3 - 0.7) / 1k ≈ 2.6 mA base drive, useful for stronger saturation.
S8050 base pulldown:
47 kΩ to 100 kΩ from base to emitter to keep it off during reset.
AO3401A gate pull-up to source/battery:
For faster switching: 4.7 kΩ to 10 kΩ.
Lower values switch faster but increase current when S8050 pulls down.
AO3401A gate series resistor:
22 Ω to 100 Ω close to gate to reduce ringing.
AO3401A gate-source clamp:
Add 10–12 V Zener if AO3401A Vgs max is not safely above 16.8 V.
AON6324 gates:
Each parallel MOSFET should have its own gate resistor, typically 5–22 Ω.
Each should have a gate-source pulldown, typically 47 kΩ to 100 kΩ.
Do not directly short both gates together without individual damping resistors.
Critical design warning: a high-current electromagnetic coil driver is not just a logic MOSFET circuit. The coil energy must be handled with a defined flyback/clamp strategy, and MOSFET selection must be checked against coil current, pulse width, repetition rate, SOA, avalanche energy, and PCB copper thermal limits.
What remains to be done when execution is available:
Verify exact AO3401A, AON6324, S8050, and STM32F051K8T6 datasheets.
Select a suitable 3.3 V buck regulator and calculate the power budget.
Create the schematic with XT30 input protection, 3.3 V rail, STM32 support circuitry, MOSFET driver chain, coil connector, flyback/clamp network, and decoupling.
Run schematic review/ERC and fix all issues.
Document the power budget, MOSFET stress analysis, and board bring-up plan.
Wirelessly connects nets on schematic. Used to organize schematics and separate functional blocks. To wirelessly connect net portals, give them same designator. #portal
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