PCB Design Specifications

spaceboxinc

spaceboxinc

Dual 5V inputs (PWR1, PWR2)
Ideal-diode ORing
Independent sensor and MCU rails
Brownout immunity
74 days

flux

2:02

Planning power architecture.

Evaluating project components.

Planning independent rails.

Understanding component-linking rules.

Accessing knowledge base.

Resolving design intents.

I’ll implement dual 5V inputs with ideal‑diode ORing, separate 3.3 V rails for MCU and sensors, and brownout immunity within the 40×30 mm, 4‑layer constraints.
Planned steps:
  • Inputs/ORing, then two regulated rails (+3V3_MCU, +3V3_SENS) with beads/decoupling, then UVLO + reset supervisor, test points, and layout constraints.
Click Start on the plan bar to execute.
Quick confirmations:
  1. Expected max/typ current for +3V3_MCU and +3V3_SENS?
  2. PWR1/PWR2 source and connector types (USB‑C, JST, header) and need for TVS?
  3. Preference: low‑noise LDO for sensors vs high‑efficiency buck (or buck->LDO)?
Set rail currents
Pick power sources
Choose regulator topology
Request ideal-diode parts
Add reset supervisor
74 days
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    FCBoard thumbnail
    40×30 mm 4-Layer FCBoard with dual JST-GH 1.25 mm top-entry GH-6 connectors for PWR1/PWR2, SWD 1.27 mm debug-only connector, dual 5 V ideal-diode ORing, isolated USB_5V, dedicated nets (PWR1_5V, PWR2_5V, 5V_IO, 5V_SENS, 3V3_MCU, 3V3_IMU_A/B/C), per-IMU LDOs with inline ferrites and decoupling, and MCU VDDA ferrite isolation #JSTGH #CubeGrade #PowerArchitecture #FCBoard

    Properties

    mm
    mm
    Diagram
    


  
    
  
  
    
  














PWR1_5V Connector
PWR2_5V Connector
Dual node_5V ORing
"LDO MCU\n3.3V Rail (3V3_MCU)"
"LDO IMU_A\n3.3V Rail (3V3_IMU_A)"
"LDO IMU_B\n3.3V Rail (3V3_IMU_B)"
"LDO IMU_C\n3.3V Rail (3V3_IMU_C)"
    mm

    Pricing & Availability

    Distributor

    Qty 1

    Arrow

    $158.21–$191.04

    Digi-Key

    $178.21–$185.83

    LCSC

    $214.98–$216.22

    Mouser

    $263.30

    TME

    $18.34

    Verical

    $147.49–$173.02

    Controls