Complex Programmable Logic Device (CPLD) – EEPROM-based in-system programmable CPLD with 128 macrocells, 2,500 usable gates, 68 user I/O pins, and 8 logic array blocks for implementing custom digital logic. Operates from a 4.75 V to 5.25 V supply, features 10 ns maximum pin-to-pin propagation delay, IEEE 1149.1 JTAG boundary-scan, in-system programmability (ISP), and a programmable security bit. Housed in an 84-pin PLCC package and specified for an operating temperature range of 0°C to +70°C.
#Altera #EPM7128SLC8410N #EPM7128 #MAX7000S #CPLD #ProgrammableLogic #EEPROM #ISP #JTAG #LogicDevice #PLCC84 #EmbeddedSystems
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