Part Audit Review
Part Audit Report
705ae7d9-b982-4d06-8722-6dff2d32acfd) without changing its symbol or footprint. The existing project property named exactly Datasheet URL was already populated, so no property mutation was required.Device/Package xc7a50tftg256, dated 2013-10-04; states 256 pins.Datasheet URL property):
Bi-Directional types; package metadata says generic 256-BGA rather than FTG256.705ae7d9-b982-4d06-8722-6dff2d32acfd) without changing its symbol or footprint. The existing project property named exactly Datasheet URL was already populated, so no property mutation was required.Device/Package xc7a50tftg256, dated 2013-10-04; states 256 pins.Datasheet URL property):
Table
| Item | Project value / claim | Official cross-check | Status |
|---|---|---|---|
| MPN | XC7A50T-1FTG256C | Ordering code resolves to XC7A50T, -1 speed, FTG256, commercial | Match |
| Manufacturer | Xilinx | Legacy manufacturer name; current vendor is AMD | Acceptable legacy value; AMD preferred for new metadata |
| Part type | Integrated Circuits | Artix-7 FPGA | Broad but not false |
| Package/case | 256-BGA | FTG256, 256-ball fine-pitch thin BGA | Incomplete specificity; should ideally say FTG256 |
| Description | Artix-7, 52,160 logic cells, 120 DSP, 2.7 Mb BRAM, 17×17 mm, 1.0 mm pitch, -1, commercial | DS180: 52,160 logic cells, 120 DSP48E1, 2,700 Kb BRAM; FTG256 17×17 mm, 1.0 mm; -1C supported | Match (use 2,700 Kb, not binary MiB) |
| Temperature | Commercial 0°C to +85°C | DS180 specifies junction temperature Tj = 0°C to +85°C | Match; description should explicitly say junction temperature |
| I/O claim | Not separately stored | DS180: FTG256 has 170 HR I/O and 0 GTP | Informational omission |
| Datasheet URL | DS180 official AMD URL | Official and relevant | Present; preserved unchanged |
Pin Number). It was compared ball-for-ball against all 256 entries in AMD's xc7a50tftg256pkg.txt. Duplicate ball IDs, missing official balls, extra symbol balls, and ball/name mismatches were checked.Pin Type = Bi-Directional. That is reasonable for general HR I/O but over-broad for dedicated inputs, outputs, and analog pins. Power and ground terminals are consistently Power In.Table
| Severity | Affected balls | Current | Evidence-based issue / recommended semantic type |
|---|---|---|---|
| Medium | L7 TCK_0; N7 TDI_0; M7 TMS_0 | Bi-Directional | Dedicated JTAG inputs; should be Input |
| Medium | N8 TDO_0 | Bi-Directional | Dedicated JTAG data output; should be Output/Tri-State as supported by the EDA type system |
| Medium | M9 M0_0; M10 M1_0; M11 M2_0 | Bi-Directional | Configuration mode straps; inputs |
| Medium | L9 PROGRAM_B_0; E7 CFGBVS_0 | Bi-Directional | Dedicated configuration control/strap inputs |
| Medium | H8 VP_0; J7 VN_0; J8 VREFP_0; H7 VREFN_0; K8 DXP_0; K7 DXN_0 | Bi-Directional | Dedicated analog/XADC or temperature-sense terminals; should be analog input/passive semantics, not digital bidirectional |
| Low / mode-dependent | E8 CCLK_0; H10 DONE_0; K10 INIT_B_0 | Bi-Directional | Direction/drive behavior depends on configuration mode; current generic type is defensible but descriptions are needed to prevent misuse |
| Documentation | All 256 terminals | No pin descriptions | Add official functional descriptions in a future controlled symbol revision; no audit-time edit made |
BGA256C100P16X16_1700X1700X155.kicad_modX155 suggests a 1.55 mm model/package-height convention, while PK053 reports approximately 1.40 mm maximum package height. The actual STEP model height was not dimensionally extracted by the available structured layout reader, so this is a model-height naming concern, not a confirmed geometry failure.Pin Number, and the label set equals the official 256-ball set. No missing, extra, duplicate, or wrongly mapped footprint pads were found.Table
| Category | Affected pads | Result |
|---|---|---|
| Missing / extra / duplicate pad IDs | None | Pass |
| Symbol-to-pad mapping mismatch | None | Pass |
| Array pitch / extents | All | Pass: 1.0 mm; 15.0 mm center span |
| Body outline | All | Pass: 17.0 × 17.0 mm |
| Land diameter | All 256 | 0.50 mm; plausible, but no project citation to AMD/assembler land-pattern guidance |
| Model height metadata | Whole package | Review recommended: footprint name says X155; official drawing is about 1.40 mm max |
256-BGA; and the footprint/model naming hints at a possible height discrepancy requiring direct STEP measurement. No symbol or footprint changes were made, per audit-only scope.Datasheet URLhttps://docs.amd.com/v/u/en-US/ds180_7Series_OverviewScope and disposition
Authoritative sources
Metadata and claims
Symbol terminal audit
Method
Mapping result
Names, descriptions, and electrical types
Footprint and pad mapping audit
Imported footprint geometry
Official package geometry comparison
Pad mapping result
Overall conclusion
Property change log