Part Data Audit and Update

Worked for 3 mins 39 sec

Thought for 32 sec — Finding project updates

Set Implementation Details.

Thought for 6 sec

3/4 Cross-check symbol pins, footprint, and descriptions against datasheets

Inspect schematic and layout part data

Find official datasheets for missing URLs and update part properties

Cross-check symbol pins, footprint, and descriptions against datasheets

Summarize key specs and mismatches

Thought for 5 sec

Found 1 results for Extract USR-ES1 module key specs, pin definition table, mechanical dimensions and footprint/header pitch details..

Looking for footprint assets.

Thought for 5 sec

Reading layout details.

Thought for 16 sec — Inspecting terminal properties

Set properties on GND_1, GND_2, MOSI and 9 more.

Thought for a moment

Correcting power pin standards

I need to make sure I'm using the correct power pin type standard. So, I'll focus on the Power In and

cherepanyadima

Provide a concise direct to the point best description for this part based from the datasheet. i don't need a very long but useless description.

Thought for 7 sec

flux

Understood — I’ll keep the description concise and datasheet-based, and update the part/project description accordingly before finishing the audit.

Worked for 2 mins 27 sec

flux

Updated the part description to:

USR-ES1 W5500 SPI-to-Ethernet module with 3.3 V SPI interface, integrated TCP/IP stack, and 10/100 Mbps RJ45 Ethernet.

I also updated the pin descriptions/types from the datasheet and created the audit summary here: USR-ES1 Part Audit (usr-es1-part-audit). Main flags: active-low pins are named shorter in Flux (CS/INT/RST vs SCSn/INTn/RSTn), and the package field TO is not ideal for this 2×6 through-hole module.

Fix metadata and review

Fix package field

Set official datasheet

Run ERC and DRC

Check footprint holes

Files

Pins

Symbol

Layout

3D View

Name

Pin #

Type

Part Type

Pin Description

Terminal Order

GND_1

Ground

Terminal

Ground (group 1 pin 1)

GND_2

Ground

Terminal

Ground (group 1 pin 2)

MOSI

Input

Terminal

SPI MOSI, Master Out Slave In (group 1 pin 3)

SCLK

Input

Terminal

SPI clock input (group 1 pin 4)

Input

Terminal

SCSn SPI chip select, active low (group 1 pin 5)

INT

Output

Terminal

INTn interrupt output, active low (group 1 pin 6)

GND_3

Ground

Terminal

Ground (group 2 pin 1)

3V3_1

Power In

Terminal

+3.3 V power input (group 2 pin 2)

3V3_2

Power In

Terminal

+3.3 V power input (group 2 pin 3)

Not Connected

Terminal

Not connected (group 2 pin 4)

RST

Input

Terminal

RSTn reset input, active low; hold low >=2 us, wait >=150 ms after release (group 2 pin 5)

MISO

Output

Terminal

SPI MISO, Master In Slave Out (group 2 pin 6)

USR-ES1