The existing project Datasheet URL is set to the Renesas product page, not the direct PDF; I recorded the direct datasheet URL in Implementation Details because the project metadata tool did not expose direct editing of the Datasheet URL field.
Symbol pin mapping matches the datasheet:
Pin 1 = Gate
Pin 2 = Source
Pin 3 = Drain
Tab = Source
Key mismatch: the project description currently says 41 A, TO-220AB, and 4-lead Kelvin source, but the datasheet says 29 A at TC = 25°C, TO-220, 3 leads, source tab.
Footprint mismatch: the footprint pads are effectively placeholder-sized/positioned, not a valid TO-220 land pattern. Pads are ~0.002 mm and spaced ~0.00254 mm, which is clearly incorrect for a through-hole TO-220.
Key datasheet specs: 650 V VDS, 800 V transient VDS, 72 mΩ typical / 85 mΩ max RDS(on), 29 A continuous drain current at 25°C, ±20 V VGS, 4 V typical threshold, 9 nC typical gate charge, -55°C to +150°C junction range.
Documents are markdown text files which describe project goals, capture details, or even simulation outputs.
Assets
TP65H070G4PS
TP65H070G4PS.stp3D Model
TP65H070G4PS
TO254P473X1016X1951-3P.kicad_modFootprint
TP65H070G4PS-thumb.png
TP65H070G4PS-thumbThumbnail
TP65H070G4PS.svg
TP65H070G4PSDefault
TP65H070G4PS
N-Channel 650 V 29A (Tc) 96W (Tc) Through Hole TO-220AB
650 V GaN FET for high-efficiency power switching applications. Rated for 650 V drain-to-source voltage (VDS) with 70 mΩ typical RDS(on), it supports 41 A continuous drain current (TC = 25°C). The device features a normally-off (enhancement-mode) GaN HEMT, ±20 V gate-source voltage rating, and is housed in a TO-220 package (4-lead, Kelvin source) for improved gate drive performance.