Schematic Symbol Fix

A

adrian95

Fix this issue: The structured 32-pin terminal data, grouping, sections, pin numbers, and footprint mappings verify correctly, but the schematic symbol preview renders pin/section text as empty outlined boxes or missing glyphs and becomes oversized/malformed.

flux

I’ll inspect the symbol style and assets, isolate the rendering trigger, apply the safest symbol-level fix without changing the verified terminal mappings, then recheck the preview.

flux

The malformed custom SVG was the active rendering path. I’ve disabled it as the default so the symbol now renders from the verified structured pin and section data; I’m checking the regenerated preview and mappings now.

flux

Fixed. The malformed custom SVG was disabled as the default symbol, so Flux now uses the generated parametric symbol with readable pin text and valid geometry.
  • All 32 pins, numbers, sections, groups, orientations, and footprint mappings remain intact.
  • The original SVG remains stored in the project but is inactive.
  • The regenerated symbol preview renders correctly without missing glyphs or outlined boxes.
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Files

Pins

Symbol

Layout

3D View

Name
Pin #
Type
Section
Pin Group
Orientation
NRST
1
Bi-Directional
Reset
Reset
Left
OSCIN/PA1
2
Bi-Directional
Clock
Clock
Right
OSCOUT/PA2
3
Bi-Directional
Clock
Clock
Right
VSS
4
Ground
Ground
Ground
Bottom
VCAP
5
Power Out
Power
Power
Top
VDD
6
Power In
Power
Power
Top
VDDIO
7
Power In
Power
Power
Top
AIN12/PF4
8
Bi-Directional
Analog
Analog
Left
VDDA
9
Power In
Power
Power
Top
VSSA
10
Ground
Ground
Ground
Bottom
I2C_SDA/AIN5/PB5
11
Bi-Directional
Communication/Debug
Communication/Debug
Right
I2C_SCL/AIN4/PB4
12
Bi-Directional
Communication/Debug
Communication/Debug
Right
TIM1_ETR/AIN3/PB3
13
Bi-Directional
Analog
Analog
Left
TIM1_CH3N/AIN2/PB2
14
Bi-Directional
Analog
Analog
Left
TIM1_CH2N/AIN1/PB1
15
Bi-Directional
Analog
Analog
Left
TIM1_CH1N/AIN0/PB0
16
Bi-Directional
Analog
Analog
Left
PE5/SPI_NSS
17
Bi-Directional
Communication/Debug
Communication/Debug
Right
PC1_(HS)/TIM1_CH1
18
Bi-Directional
GPIO/Timer
GPIO/Timer
Left
PC2_(HS)/TIM1_CH2
19
Bi-Directional
GPIO/Timer
GPIO/Timer
Left
PC3_(HS)/TIM1_CH3
20
Bi-Directional
GPIO/Timer
GPIO/Timer
Left
PC4_(HS)/TIM1_CH4
21
Bi-Directional
GPIO/Timer
GPIO/Timer
Left
PC5/SPI_SCK
22
Bi-Directional
Communication/Debug
Communication/Debug
Right
PC6/SPI_MOSI
23
Bi-Directional
Communication/Debug
Communication/Debug
Right

STM8AF6266TCX