Part Audit Review

flux

I’ll correct the pin name and ground types, add explicit UFQFPN48 package metadata, populate all 49 terminal descriptions from the ST pin table, then re-inspect the part to verify the changes.

flux

Corrected and verified:
  • Pin 47 renamed to VLXSMPS in both symbol and footprint.
  • Pins 48 and 49 changed to Ground.
  • UFQFPN48 package dimensions, pitch, and exposed-pad details added to project metadata.
  • Datasheet-based descriptions added to all 49 terminals.
  • Re-inspection confirms 49 pins remain present with correct numbering.
A

adrian95

Organize the terminals into proper pin groups, sections, orientations, and terminal order.

flux

I’ll reorganize the parametric symbol by functional section, assign every terminal a pin group and deterministic order, set conventional signal/power orientations, then inspect the rendered symbol for completeness.

flux

Organized and verified all 49 terminals:
  • Functional sections: GPIO, backup/low-speed, control/clock, sub-GHz radio, and power.
  • Pin groups assigned by port or function.
  • Conventional left/right/top/bottom orientations applied.
  • Deterministic, unique terminal ordering established within each group.
  • Pin numbers, names, types, descriptions, and footprint mappings remain intact.
Improve symbol readability
Fix paste aperture
Add symbol grouping
Review package footprint
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Files

Pins

Symbol

Layout

Preview

PB3
Pin Number
1
PB7
Pin Number
5
RFI_N
Pin Number
21
VSSSMPS
Pin Number
48
PA4
Pin Number
12
PA0
Pin Number
7
VDDPA
Pin Number
25
PC14-OSC32_IN
Pin Number
39
PA5
Pin Number
13
PB4
Pin Number
2
PA1
Pin Number
8
PA13
Pin Number
36
PA10
Pin Number
33
PA12
Pin Number
35
PB2
Pin Number
31
PB5
Pin Number
3
PA9
Pin Number
17
VDD
Pin Number
11
PA11
Pin Number
34
PA3
Pin Number
10
RFI_P
Pin Number
20
PC13
Pin Number
38
PB12
Pin Number
32
VFBSMPS
Pin Number
45
PA14
Pin Number
42
VDDRF
Pin Number
28
OSC_OUT
Pin Number
27
PA7
Pin Number
15
GND
Pin Number
49
VR_PA
Pin Number
24
PB8
Pin Number
6
NRST
Pin Number
18
VDDA
Pin Number
41
RFO_LP
Pin Number
22
VDDRF1V55
Pin Number
29
PA15
Pin Number
43
PA6
Pin Number
14
VBAT
Pin Number
37
OSC_IN
Pin Number
26
PB0-VDD_TCXO
Pin Number
30
PA2
Pin Number
9
VDD
Pin Number
44
VLXSMPS
Pin Number
47
PB6
Pin Number
4
RFO_HP
Pin Number
23
PC15-OSC32_OUT
Pin Number
40
VDDSMPS
Pin Number
46
PH3-BOOT0
Pin Number
19
PA8
Pin Number
16
Name
Pin #
Type
Part Type
Pin Description
Pin Group
PB3
1
Bi-Directional
Terminal
GPIO PB3; alternate functions include JTDO/TRACESWO, TIM2_CH2, SPI1_SCK, RF_IRQ0 and USART1_RTS.
GPIOB
PB4
2
Bi-Directional
Terminal
GPIO PB4; alternate functions include NJTRST, I2C3_SDA, SPI1_MISO and USART1_CTS; analog comparator and ADC input capable.
GPIOB
PB5
3
Bi-Directional
Terminal
GPIO PB5; alternate functions include LPTIM1_IN1, I2C1_SMBA, SPI1_MOSI, RF_IRQ1 and USART1_CK.
GPIOB
PB6
4
Bi-Directional
Terminal
GPIO PB6; alternate functions include LPTIM1_ETR, I2C1_SCL, USART1_TX and TIM16_CH1N.
GPIOB
PB7
5
Bi-Directional
Terminal
GPIO PB7; alternate functions include LPTIM1_IN2, TIM1_BKIN, I2C1_SDA, USART1_RX and TIM17_CH1N.
GPIOB
PB8
6
Bi-Directional
Terminal
GPIO PB8; alternate functions include TIM1_CH2N, I2C1_SCL, RF_IRQ2 and TIM16_CH1.
GPIOB
PA0
7
Bi-Directional
Terminal
GPIO PA0; timer, I2C3, I2S clock, USART2 CTS and comparator functions; TAMP_IN2/WKUP1 capable.
GPIOA
PA1
8
Bi-Directional
Terminal
GPIO PA1; timer, I2C1 SMBA, SPI1_SCK, USART2/LPUART1 RTS and debug functions.
GPIOA
PA2
9
Bi-Directional
Terminal
GPIO PA2; LSCO, TIM2_CH3, USART2_TX, LPUART1_TX and comparator output functions.
GPIOA
PA3
10
Bi-Directional
Terminal
GPIO PA3; TIM2_CH4, I2S2_MCK, USART2_RX and LPUART1_RX functions.
GPIOA
VDD
11
Power In
Terminal
Main digital supply voltage input, 1.8 V to 3.6 V operating range.
Main Supply
PA4
12
Bi-Directional
Terminal
GPIO PA4; RTC_OUT2, LPTIM outputs, SPI1_NSS, USART2_CK and sub-GHz SPI debug functions.
GPIOA
PA5
13
Bi-Directional
Terminal
GPIO PA5; TIM2, SPI2_MISO, SPI1_SCK, sub-GHz SPI clock debug and LPTIM2 functions.
GPIOA
PA6
14
Bi-Directional
Terminal
GPIO PA6; TIM1_BKIN, I2C2_SMBA, SPI1_MISO, LPUART1_CTS and TIM16_CH1 functions.
GPIOA
PA7
15
Bi-Directional
Terminal
GPIO PA7; TIM1_CH1N, I2C3_SCL, SPI1_MOSI, comparator output and TIM17_CH1 functions.
GPIOA
PA8
16
Bi-Directional
Terminal
GPIO PA8; MCO, TIM1_CH1, SPI2/I2S2 clock, USART1_CK and LPTIM2_OUT functions.
GPIOA
PA9
17
Bi-Directional
Terminal
GPIO PA9; TIM1_CH2, SPI2/I2S2, I2C1_SCL and USART1_TX functions.
GPIOA
NRST
18
Bi-Directional
Terminal
Bidirectional active-low system reset pin.
Reset & Boot
PH3-BOOT0
19
Bi-Directional
Terminal
GPIO PH3 and BOOT0 boot-mode selection input sampled for system boot configuration.
Reset & Boot
RFI_P
20
Input
Terminal
Positive differential sub-GHz RF receiver input.
RF Input
RFI_N
21
Input
Terminal
Negative differential sub-GHz RF receiver input.
RF Input
RFO_LP
22
Output
Terminal
Low-power sub-GHz RF transmitter output, programmable up to +15 dBm.
RF Output
RFO_HP
23
Output
Terminal
High-power sub-GHz RF transmitter output, programmable up to +22 dBm.
RF Output

STM32WLE5CCU6