In current STM32MP135FAF7 part project, set these exact properties preserving all others: USB group/section, Left, order 4 on USB__DM1, USB__DM2, USB__DP1, USB__DP2, USB__RREF. Analog group/section, Right, order 5 on VREF+, VREF-. Clock group/section, Left, order 6 on PC14-_OSC32__IN, PC15-_OSC32__OUT, PH0-_OSC_IN, PH1-_OSC__OUT. Reset/Boot group/section, Right, order 7 on NRST, PI4-_BOOT0, PI5-_BOOT1, PI6-_BOOT2. Debug group/section, Left, order 8 on NJ_TRST, PF15. System/Control group/section, Right, order 9 on BYPAS_S_REG_1V8, PDR__ON, PWR__CPU__ON, PWR__LP, PWR__ON. Verify 22 terminals.
The project description is consistent with the device feature set: LCD-TFT, camera interface, dual Ethernet, dual CAN FD, ADCs, timers, audio, cryptography, and advanced security.
Datasheet property
The Datasheet URL property was already populated with the official ST PDF:
No update was necessary, so no property mutation was made.
Metadata findings
Package or Case Code is incorrect: project value TO; correct value is TFBGA320 / 320-ball TFBGA.
Part Type is noncanonical: project value Integrated Circuits; Flux's canonical option is singular Integrated Circuit, while Processor would be more specific if available.
Description is electrically consistent but omits mechanical identity: TFBGA320, 11 x 11 mm, 0.5 mm pitch.
Schematic symbol audit
320 terminals are present.
320 unique BGA ball numbers are represented.
Observed ball-to-signal assignments agree with the TFBGA320 column in ST Table 7.
Symbol and footprint coverage is one-to-one: 320 terminals and 320 pads.
Symbol mismatches and deficiencies
All 320 terminals have:
Pin Type = Unspecified
No Pin Description
No Section
No Pin Group
No Bus Group
No explicit terminal order
ST Table 7 provides ball type and function information, so the current symbol lacks the metadata needed for meaningful ERC and functional organization.
Pin-name fidelity
No swapped balls were found, but many names differ from literal ST notation:
Instance suffixes such as VSS_1...VSS_56, VDD_1...VDD_16, VDD_CORE_n, VDD_CPU_n, and VDDQ__DDR_n are used to disambiguate repeated names.
Double underscores replace separators in many DDR, USB, power, and ground names.
C20 DDR_DQS0P uses a different underscore convention from related DDR pins.
Noncanonical punctuation appears in oscillator and boot names, including M2 PC14-_OSC32__IN, L3 PC15-_OSC32__OUT, T3 PH0-_OSC_IN, U2 PH1-_OSC__OUT, Y17 PI4-_BOOT0, AA15 PI5-_BOOT1, and Y15 PI6-_BOOT2.
Power names use formatting such as VDD_CORE and VDD_CPU instead of ST's VDDCORE and VDDCPU.
These are naming and metadata fidelity issues, not verified electrical mapping errors.
320 circular SMD pads, with no holes, appropriate for BGA
21 x 21 coordinate framework with depopulated positions matching the 320-ball map
0.5 mm pitch
10.0 mm outer ball-center span
11.0 x 11.0 mm fabrication outline
Pin-1 corner treatment
Approximately 11 x 11 mm silkscreen body outline
Pad geometry mismatch
All 320 copper pads are 0.29 mm diameter. ST's recommended PCB design values are:
Copper land Dpad: 0.230 mm
Solder-mask opening Dsm: 0.330 mm typical
Stencil opening: 0.230 mm
Stencil thickness: 0.100-0.125 mm
Therefore, every populated pad uses a copper land 0.06 mm larger than ST's recommendation. The imported geometry also does not visibly model the distinct copper, solder-mask, and paste dimensions recommended by ST.
Footprint uncertainties
The 13.15 mm courtyard is conservative relative to the 11 mm body; ST does not prescribe a courtyard.
The rendered footprint reports packageSize = 0, so dimensional intent resides in the imported asset.
The fabrication-shape node is disabled by an override even though the source asset contains the correct outline.
Exact STEP model body dimensions and seating alignment could not be numerically confirmed from exposed metadata.
STM32MP135FAF7.stp - STEP 3D model, referenced at position 0/0/0, scale 1/1/1, rotation 0/0/0
Conclusion
The exact part identity, ordering code, ball count, package body dimensions, pitch, populated ball map, and observed pin-to-ball assignments are consistent with STM32MP135FAF7. The important issues are the incorrect package metadata, absent pin descriptions/electrical classifications/groups on all terminals, nonliteral pin-name formatting, and footprint copper lands that do not follow ST's recommended 0.23 mm land pattern.
No symbol, footprint, or metadata corrections were applied as part of this audit.