STM32 Pin Group Update

adrian95

adrian95

flux

In current STM32MP135FAF7 part project, set these exact properties preserving all others: USB group/section, Left, order 4 on USB__DM1, USB__DM2, USB__DP1, USB__DP2, USB__RREF. Analog group/section, Right, order 5 on VREF+, VREF-. Clock group/section, Left, order 6 on PC14-_OSC32__IN, PC15-_OSC32__OUT, PH0-_OSC_IN, PH1-_OSC__OUT. Reset/Boot group/section, Right, order 7 on NRST, PI4-_BOOT0, PI5-_BOOT1, PI6-_BOOT2. Debug group/section, Left, order 8 on NJ_TRST, PF15. System/Control group/section, Right, order 9 on BYPAS_S_REG_1V8, PDR__ON, PWR__CPU__ON, PWR__LP, PWR__ON. Verify 22 terminals.

flux

Updated and verified all 22 terminals with the exact group, section, orientation, and order values requested. All other properties were preserved.
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Part Audit Report
Scope
Audit of available metadata, official documentation, schematic symbol terminals, PCB footprint, and attached assets for STM32MP135FAF7.
Official sources
Primary datasheet references: Table 7 (ball definitions), Section 7.3 / Figure 64 / Table 115 (TFBGA320 package), and Table 118 (ordering code).
Identity and key specifications

Table

ItemPart projectOfficial documentationResult
MPNSTM32MP135FAF7STM32MP135FAF7Match
ManufacturerSTMicroelectronicsSTMicroelectronicsMatch
Device classArm Cortex-A7 MPUSTM32MP135F Cortex-A7 MPUMatch
Maximum CPU frequencyUp to 1 GHzUp to 1 GHz for code 7Match
PackageMetadata says TOTFBGA320 (AF)Mismatch
Body sizeFootprint 11 x 11 mm11 x 11 mmMatch
Ball count320320Match
Ball pitch0.5 mm0.5 mmMatch
Nominal ball diameter0.30 mm0.30 mmMatch
Maximum package height1.20 mm1.20 mmMatch
Temperature code7TJ -40 C to +105 C, up to 1 GHzMatch
The project description is consistent with the device feature set: LCD-TFT, camera interface, dual Ethernet, dual CAN FD, ADCs, timers, audio, cryptography, and advanced security.
Datasheet property
The Datasheet URL property was already populated with the official ST PDF:
https://www.st.com/resource/en/datasheet/stm32mp135c.pdf
No update was necessary, so no property mutation was made.
Metadata findings
  1. Package or Case Code is incorrect: project value TO; correct value is TFBGA320 / 320-ball TFBGA.
  2. Part Type is noncanonical: project value Integrated Circuits; Flux's canonical option is singular Integrated Circuit, while Processor would be more specific if available.
  3. Description is electrically consistent but omits mechanical identity: TFBGA320, 11 x 11 mm, 0.5 mm pitch.
Schematic symbol audit
  • 320 terminals are present.
  • 320 unique BGA ball numbers are represented.
  • Observed ball-to-signal assignments agree with the TFBGA320 column in ST Table 7.
  • Symbol and footprint coverage is one-to-one: 320 terminals and 320 pads.
Symbol mismatches and deficiencies
All 320 terminals have:
  • Pin Type = Unspecified
  • No Pin Description
  • No Section
  • No Pin Group
  • No Bus Group
  • No explicit terminal order
ST Table 7 provides ball type and function information, so the current symbol lacks the metadata needed for meaningful ERC and functional organization.
Pin-name fidelity
No swapped balls were found, but many names differ from literal ST notation:
  • Instance suffixes such as VSS_1...VSS_56, VDD_1...VDD_16, VDD_CORE_n, VDD_CPU_n, and VDDQ__DDR_n are used to disambiguate repeated names.
  • Double underscores replace separators in many DDR, USB, power, and ground names.
  • C20 DDR_DQS0P uses a different underscore convention from related DDR pins.
  • Noncanonical punctuation appears in oscillator and boot names, including M2 PC14-_OSC32__IN, L3 PC15-_OSC32__OUT, T3 PH0-_OSC_IN, U2 PH1-_OSC__OUT, Y17 PI4-_BOOT0, AA15 PI5-_BOOT1, and Y15 PI6-_BOOT2.
  • Power names use formatting such as VDD_CORE and VDD_CPU instead of ST's VDDCORE and VDDCPU.
These are naming and metadata fidelity issues, not verified electrical mapping errors.
PCB footprint audit
Correct features
  • Imported asset: BGA320C50P21X21_1100X1100X120.kicad_mod
  • 320 circular SMD pads, with no holes, appropriate for BGA
  • 21 x 21 coordinate framework with depopulated positions matching the 320-ball map
  • 0.5 mm pitch
  • 10.0 mm outer ball-center span
  • 11.0 x 11.0 mm fabrication outline
  • Pin-1 corner treatment
  • Approximately 11 x 11 mm silkscreen body outline
Pad geometry mismatch
All 320 copper pads are 0.29 mm diameter. ST's recommended PCB design values are:
  • Copper land Dpad: 0.230 mm
  • Solder-mask opening Dsm: 0.330 mm typical
  • Stencil opening: 0.230 mm
  • Stencil thickness: 0.100-0.125 mm
Therefore, every populated pad uses a copper land 0.06 mm larger than ST's recommendation. The imported geometry also does not visibly model the distinct copper, solder-mask, and paste dimensions recommended by ST.
Footprint uncertainties
  • The 13.15 mm courtyard is conservative relative to the 11 mm body; ST does not prescribe a courtyard.
  • The rendered footprint reports packageSize = 0, so dimensional intent resides in the imported asset.
  • The fabrication-shape node is disabled by an override even though the source asset contains the correct outline.
  • Exact STEP model body dimensions and seating alignment could not be numerically confirmed from exposed metadata.
Attached assets
  1. STM32MP135FAF7 Symbol.svg - symbol/default thumbnail
  2. BGA320C50P21X21_1100X1100X120.kicad_mod - TFBGA320 footprint
  3. STM32MP135FAF7.stp - STEP 3D model, referenced at position 0/0/0, scale 1/1/1, rotation 0/0/0
Conclusion
The exact part identity, ordering code, ball count, package body dimensions, pitch, populated ball map, and observed pin-to-ball assignments are consistent with STM32MP135FAF7. The important issues are the incorrect package metadata, absent pin descriptions/electrical classifications/groups on all terminals, nonliteral pin-name formatting, and footprint copper lands that do not follow ST's recommended 0.23 mm land pattern.
No symbol, footprint, or metadata corrections were applied as part of this audit.

  • Scope

  • Official sources

  • Identity and key specifications

  • Datasheet property

  • Metadata findings

  • Schematic symbol audit

  • Symbol mismatches and deficiencies

  • Pin-name fidelity

  • PCB footprint audit

  • Correct features

  • Pad geometry mismatch

  • Footprint uncertainties

  • Attached assets

  • Conclusion

Documents

Assets

svg

STM32MP135FAF7

STM32MP135FAF7 Symbol.svgDefault
STM32MP135FAF7-thumb.png

STM32MP135FAF7-thumb.png

STM32MP135FAF7-thumbThumbnail
kicad_mod

STM32MP135FAF7

BGA320C50P21X21_1100X1100X120.kicad_modFootprint
STM32MP135FAF7

STM32MP135FAF7

STM32MP135FAF7.stp3D Model

STM32MP135FAF7

STM32MP135FAF7 thumbnail
Single-Core Arm® Cortex®-A7 Microprocessor (MPU) – 32-bit embedded microprocessor designed for industrial automation, Human-Machine Interfaces (HMI), IoT gateways, edge computing, smart home devices, medical equipment, multimedia systems, and Linux-based embedded applications. Part of the STM32MP1 Series, the STM32MP135FAF7 integrates a single Arm® Cortex®-A7 core operating at up to 1 GHz, with NEON™ SIMD multimedia acceleration and 3D graphics acceleration for enhanced application performance. Supports external DDR3, DDR3L, LPDDR2, and LPDDR3 memory, enabling high-performance operating systems such as Linux. Features dual Gigabit Ethernet, dual USB 2.0, CAN FD, I²C, SPI, UART/USART, SAI, SPDIF, MMC/SD/SDIO, GPIO, and IRDA interfaces for flexible connectivity. Includes advanced security features such as Arm TrustZone®, AES encryption, SHA-1/SHA-2, Secure Boot, Secure Debug, True Random Number Generator (TRNG), tamper detection, and volatile key storage for secure embedded applications. Operates with 1.8 V, 2.5 V, and 3.3 V I/O supplies, supports a −40°C to +105°C junction temperature range, and is packaged in a 320-ball TFBGA (11 × 11 mm).
#STMicroelectronics #STM32MP135FAF7 #STM32MP1 #CortexA7 #Microprocessor #LinuxMPU #IndustrialAutomation #EdgeComputing #IoTGateway #GigabitEthernet #TrustZone #EmbeddedLinux #EmbeddedSystems

Properties

STM32MP135FAF7

STMicroelectronics

Integrated Circuits

st.com/resource/en/datasheet/stm32mp135c.pdf

IC

TO

parametric-v1

Pricing & Availability

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