NAU7802SGI Review


Created a project doc

NAU7802SGI Part Review

View Document

Date: 2026-07-17 Official Nuvoton datasheet used for review: https://www.nuvoton.com/export/resource-files/en-us--DS_NAU7802_DataSheet_EN_Re...
Completed the NAU7802SGI review, updated the datasheet/metadata, corrected pin descriptions/types, and grouped all 16 pins by one primary function each with no duplicates. I also created the full review report here: NAU7802SGI Part Review.
Open items:
  • No symbol or nominal footprint mismatches found.
  • Full SOP-16 tolerance-level validation would require visual/mechanical drawing confirmation beyond searchable datasheet text.
Suggested next steps:
  1. Visually inspect the footprint against the PDF mechanical drawing.
  2. Add any application-level notes for pullups/decoupling.
  3. Publish/update the part once you’re satisfied.
  • Make the functional group more general.
  • Add a Section property to all pins, and apply the same value used in the Pin Group property to each pin's Section property.
Assign a Terminal Order from 1 to 10, starting with Power. Power should be Terminal Order 1, and Ground should be last, Terminal Order 10. For Orientation, set Power to "Top" and Ground to "Bottom." For the remaining sections/groups, you may decide the Terminal Order and Orientation yourself. For Orientation, distribute them between "Left" and "Right" — don't put everything on one side. Each group/section should have a different orientation.
I’ll generalize the pin groups, mirror each Pin Group into Section, and set Terminal Order/Orientation with Power first/top and Ground last/bottom while distributing the other groups left/right.
Updated the pin organization to more general groups: Power, Analog, Interface, and Ground.
Open items:
  • None.
Suggested next steps:
  1. Review the symbol visually to confirm the left/right grouping looks natural.
  2. Publish/update the part if the grouping matches your convention.
Arrange and review
Arrange symbol
Run part review
Update review file
Publish readiness check

REFP
Pin Number
1
VIN2N
Pin Number
4
VIN2P
Pin Number
5
VIN1P
Pin Number
3
VIN1N
Pin Number
2
REFN
Pin Number
7
VBG
Pin Number
6
Name
Pin #
Type
Section
Pin Group
Orientation
Order
Sub-symbol
Pin Description
REFP
1
Input
Analog
Analog
Left
2
Positive reference input.
VIN1N
2
Input
Analog
Analog
Left
2
Channel 1 inverting analog input.
VIN1P
3
Input
Analog
Analog
Left
2
Channel 1 non-inverting analog input.
VIN2N
4
Input
Analog
Analog
Left
2
Channel 2 inverting analog input.
VIN2P
5
Input
Analog
Analog
Left
2
Channel 2 non-inverting analog input.
VBG
6
Output
Analog
Analog
Left
2
High-impedance reference voltage output and bypass pin.
REFN
7
Input
Analog
Analog
Left
2
Negative reference input.
AVSS
8
Ground
Ground
Ground
Bottom
10
Analog ground.
DVSS
9
Ground
Ground
Ground
Bottom
10
Digital ground.
XIN
10
Input
Interface
Interface
Right
3
External crystal oscillator input, typically 4.9152 MHz.
XOUT
11
Output
Interface
Interface
Right
3
External crystal oscillator output.
DRDY
12
Output
Interface
Interface
Right
3
Data-ready output indicating conversion complete and new data available for readout.
SCLK
13
Input
Interface
Interface
Right
3
Serial data clock input for 2-wire interface; datasheet notes CMOS open-drain output behavior.
SDIO
14
Bi-Directional
Interface
Interface
Right
3
Serial data input/output for communication with host; open-drain 2-wire data line.
DVDD
15
Power In
Power
Power
Top
1
Digital power supply, 2.7 V to 5.5 V.
AVDD/LDO
16
Power In
Power
Power
Top
1
Analog power supply / programmable LDO output; external AVDD 2.7 V to 5.5 V when LDO is off, low-ESR bypass capacitor recommended.

NAU7802SGI