Review all available part information (MPN, package, pin count, description, properties). If no datasheet URL is already set, search the web for the official datasheet and update the part's Datasheet property with the URL. Then cross-check the schematic symbol, footprint, and pin descriptions against the datasheet. Summarize key specs and flag any mismatches.
I’ll audit the part metadata, locate and attach the official datasheet if needed, then cross-check the symbol, footprint, and pin descriptions against the manufacturer documentation.
The part already has an MPS datasheet URL. I’m verifying that source now and comparing the complete 24-pin map and QFN geometry against the stored symbol and footprint.
Audit of MP4247GQV-0000 metadata, schematic symbol, PCB footprint, and terminal descriptions against the official Monolithic Power Systems MP4247 datasheet (MPS document viewer, document ID 9935; package information on pp. 39–40).
Stored Part InformationKey Datasheet Specifications
Four-switch, single-inductor buck-boost converter with two integrated low-side MOSFETs and gate drivers for two external high-side N-channel MOSFETs.
Start-up input range: 3.6 V to 36 V; supports operation down to 2.8 V falling VIN when VOUT is above 3.5 V.
Output range: 1 V to 24 V, 1% accuracy for this variant family.
Rated capability: up to 5 A, 100 W, and up to 98% peak efficiency, subject to operating conditions and external component d...
Audit complete. The official MPS datasheet URL was already present, so no property update was needed; however, the part has a critical mismatch: the datasheet specifies a 20-pin QFN, while the symbol and footprint contain 24 pins/pads. The Logic / AND classification and missing pin types/descriptions are also incorrect.
Full specifications, pin map, and remediation details are in Part Audit. I also filed an internal part-quality report; this part should not be used or published until corrected.
Audit of MP4247GQV-0000 metadata, schematic symbol, PCB footprint, and terminal descriptions against the official Monolithic Power Systems MP4247 datasheet (MPS document viewer, document ID 9935; package information on pp. 39–40).
Stored Part Information
Table
Field
Stored value
Assessment
Manufacturer part number
MP4247GQV-0000
Correct
Manufacturer
Monolithic Power Systems (MPS)
Correct
Description
36V, buck-boost converter with low-side MOSFETs and I2C
Substantially correct, but omits 100W/5A capability and external high-side MOSFET requirement
Datasheet URL
Official MPS document-viewer URL
Present; no update required
Part type
Integrated Circuits
Acceptable but broad
IC subtype / logic function
Logic / AND
Incorrect; this is a power-management buck-boost controller/converter, not logic
Symbol terminal count
24
Incorrect; datasheet package is QFN-20 with 20 terminals
Footprint
Named QFN-20 (3 mm × 5 mm), but contains pads 1–24
Critical mismatch
Key Datasheet Specifications
Four-switch, single-inductor buck-boost converter with two integrated low-side MOSFETs and gate drivers for two external high-side N-channel MOSFETs.
Start-up input range: 3.6 V to 36 V; supports operation down to 2.8 V falling VIN when VOUT is above 3.5 V.
Output range: 1 V to 24 V, 1% accuracy for this variant family.
Rated capability: up to 5 A, 100 W, and up to 98% peak efficiency, subject to operating conditions and external component design.
Selectable switching frequency: 280 kHz, 420 kHz, or 600 kHz.
Default 7-bit I2C slave address: 0x67.
Operating junction range: −40 °C to +125 °C; absolute maximum junction temperature: 150 °C.
Package: 20-lead FCQFN/QFN, 3 mm × 5 mm, 0.50 mm pitch, MSL 1.
QFN-20 thermal resistance: θJA 39.1 °C/W and θJC 2.5 °C/W under the datasheet test conditions.
Datasheet Pin Map
Table
Pin
Name
Function
1
SCL
I2C clock input
2
SDA
I2C data
3
ALT
Open-drain, active-low I2C alert output
4
FB
Output feedback divider input
5
ISEN−
Negative current-sense input
6
ISEN+
Positive-side current-sense connection (the datasheet text appears to contain a wording typo calling it “negative,” but the connection instruction and name distinguish it from ISEN−)
7
VOUT
Output-voltage sense / VCC bias source under applicable conditions
8
BST2
Bootstrap supply for HG2; 0.22 µF to SW2
9
HG2
External boost-side high-side MOSFET gate drive
10
VCC
Internal 5 V LDO output; 0.47–1 µF decoupling
11
AGND
Analog ground
12
PGND
Power ground
13
SW2
Boost-side switching node
14
SW1
Buck-side switching node
15
PGND
Power ground
16
IMON
Current-monitor output
17
EN
Enable input
18
HG1
External buck-side high-side MOSFET gate drive
19
BST1
Bootstrap supply for HG1; 0.22 µF to SW1
20
VIN
Internal logic supply input
Mismatches and Risks
Critical — footprint and pin count
The datasheet defines a 20-terminal QFN-20, while the current symbol and footprint define 24 terminals/pads. The extra terminals are:
Pin 21: VIN_2
Pin 22: VOUT_2
Pin 23: AGND_2
Pin 24: IMON_2
These terminals do not exist in the datasheet. A PCB made with this footprint would not match the physical IC land pattern and should be considered not manufacturable/reliable as-is.
Critical — footprint geometry
The footprint asset is labeled QFN-20 but explicitly creates 24 copper pads. The official recommended land pattern has 20 lands at 0.50 mm pitch. The footprint must be rebuilt or replaced from the manufacturer land pattern before use.
Major — symbol terminal metadata
All symbol terminals currently have Pin Type: Unspecified and no pin descriptions. Pin numbers 1–20 have names that generally agree with the datasheet, but electrical types and functional descriptions are absent. This weakens ERC and makes incorrect connections harder to detect.
Recommended pin types:
Inputs: SCL, FB, ISEN−, ISEN+, VOUT, EN, VIN
Bidirectional/open-drain interface: SDA
Open-drain output: ALT
Outputs: HG1, HG2, VCC, IMON
Power/switch nodes: BST1, BST2, SW1, SW2
Grounds: AGND, PGND
Major — classification properties
The stored IC-specific classification Logic / AND is incorrect. It should be classified as a power-management IC / buck-boost converter or controller.
Minor — description completeness
The description is directionally correct but should mention 100 W, up to 5 A, integrated low-side MOSFETs, external high-side MOSFET gate drivers, and the I2C/OTP configuration interface.
Datasheet source note
The stored URL is an official MPS document-viewer URL rather than a direct PDF URL. It is valid for the attached datasheet extraction, but ordinary web scraping can be blocked by the MPS client challenge.
Recommended Remediation
Replace the current footprint with the official 20-lead FCQFN 3 mm × 5 mm recommended land pattern.
Remove symbol terminals 21–24 and confirm exact symbol-to-pad mapping for pins 1–20.
Add datasheet-derived pin descriptions and electrical pin types.
Change the IC classification from Logic/AND to a buck-boost power-management IC.
Re-check the 3D model against the corrected 20-pad footprint after replacement.
Verdict
Do not use or publish this part as-is. The MPN and datasheet association are correct, and pins 1–20 are named consistently with the datasheet, but the 24-terminal symbol/footprint is incompatible with the physical 20-terminal package.