Part Validation Review
MAXM86161AEFD+ Part Validation Review
Unspecified, and package metadata is underspecified as Module instead of 14-pin OLGA / F142A4-1.Pin Description values for all 14 terminals.14-pin OLGA, package code F142A4-1, land pattern 90-100106.Table
| Field | Current value | Datasheet reference | Status |
|---|---|---|---|
| Manufacturer Part Number | MAXM86161AEFD+ | MAXM86161AEFD+ ordering option | Match |
| Manufacturer Name | Analog Devices | Analog Devices | Match |
| Description | Single-Supply Integrated Optical Module for HR and SpO2 Measurement | Datasheet title/general description | Match |
| Datasheet URL | Analog Devices MAXM86161A PDF | Official Analog Devices PDF | Match; no update needed |
| Pin / pad count | 14 | 14-pin OLGA | Match |
| Package or Case Code | Module | 4.3 mm x 2.9 mm x 1.4 mm, 14-pin OLGA; package code F142A4-1 | Underspecified; recommend 14-pin OLGA / F142A4-1 |
Table
| Category | Datasheet value |
|---|---|
| Function | Integrated optical data-acquisition module for heart-rate and SpO2 measurement |
| Package | 4.3 mm x 2.9 mm x 1.4 mm, 14-pin OLGA |
| Package code | F142A4-1 |
| Outline / land pattern | Outline 21-100309; land pattern 90-100106 |
| Operating temperature | -40°C to +85°C |
| Supply | VLED 3.0 V to 5.5 V single supply |
| Internal LDO output | VLDO 1.8 V typ, 1.68 V to 1.92 V |
| Reference | VREF 1.210 V typ, 1.195 V to 1.220 V |
| Interface | I2C, 0 kHz to 400 kHz; write address C4h, read address C5h |
| ADC | 19-bit current-mode / charge-integrating ADC |
| LED drivers | Three 8-bit LED current DACs; full-scale ranges 31 / 62 / 93 / 124 mA |
| FIFO | Datasheet text describes 128-word FIFO; block diagram text shows 256-word FIFO, so verify intended interpretation in firmware docs |
| Ambient rejection | 200 µA DC ambient rejection typ; >70 dB ambient rejection at 120 Hz listed in features |
| Integration times | 14.8 µs, 29.4 µs, 58.7 µs, 117.3 µs |
| PPG sample rate | 8 sps to 4096 sps |
| Photodiode | Peak sensitivity 860 nm; spectral range 420 nm to 1020 nm |
| Integrated LEDs | Green, IR, red emitters; green 520 nm to 535 nm, IR 880 nm typ, red 660 nm typ |
Table
| Pin | Flux terminal | Datasheet name | Datasheet function | Status |
|---|---|---|---|---|
| 1 | SDA | SDA | I2C data input/output | Match |
| 2 | SCL | SCL | I2C clock input | Match |
| 3 | LDO_EN | LDO_EN | LDO enable; high = on, low = shutdown | Match |
| 4 | VLDO | VLDO | Internal LDO output; bypass with 1 µF to GND_ANA | Match |
| 5 | VLED | VLED | LED power supply input; bypass with 10 µF to PGND | Match |
| 6 | N.C._1 | N.C. | Internally connected to LED3_DRV / red LED cathode; solder for mechanical stability; do not connect | Name acceptable, description missing |
| 7 | N.C._2 | N.C. | Internally connected to LED2_DRV / IR LED cathode; solder for mechanical stability; do not connect | Name acceptable, description missing |
| 8 | N.C._3 | N.C. | Internally connected to LED1_DRV / green LED cathode; solder for mechanical stability; do not connect | Name acceptable, description missing |
| 9 | PGND | PGND | LED power return; connect to PCB ground | Match |
| 10 | GND_DIG | GND_DIG | Digital logic/pad return; connect to PCB ground | Match |
| 11 | GND_ANA | GND_ANA | Analog power return; connect to PCB ground | Match |
| 12 | VREF | VREF | Internal reference decoupling point; bypass with 1 µF to GND_ANA | Match |
| 13 | GPIO | GPIO | General-purpose I/O; open-drain when output, active-low | Match |
| 14 | INTB | INTB | Open-drain interrupt | Match |
Pin Type properties are currently Unspecified. This is a quality issue because ERC cannot distinguish I2C I/O, open-drain outputs, power pins, grounds, no-connect pins, and passive/reference decoupling nodes.Pin Description properties are set on the terminals. This is the main symbol metadata gap.Table
| Pin | Name | Recommended pin type / modeling note |
|---|---|---|
| 1 | SDA | Bidirectional or open-drain I/O |
| 2 | SCL | Input; I2C clock |
| 3 | LDO_EN | Input |
| 4 | VLDO | Power output / regulator output / passive decoupling node |
| 5 | VLED | Power input |
| 6-8 | N.C. | No-connect; solder pad present, do not connect electrically |
| 9 | PGND | Ground / power return |
| 10 | GND_DIG | Ground / power return |
| 11 | GND_ANA | Ground / power return |
| 12 | VREF | Passive/reference decoupling node or power output reference |
| 13 | GPIO | Bidirectional/open-drain-capable I/O |
| 14 | INTB | Open-drain output |
Pin Type: Unspecified. Assign electrical pin types so ERC can catch real errors.Package or Case Code is currently Module; the datasheet-specific package is 14-pin OLGA, package code F142A4-1, land pattern 90-100106.Reference Source
Current Part Information Observed in Flux
Key Datasheet Specs
Pinout Cross-Check
Schematic Symbol Review
Footprint Review
Mismatches / Issues Flagged
Overall Verdict