LMR36503 Part Review
Worked for 1 min 48 sec
Found the official TI LMR36503 datasheet and added it to the part’s Datasheet URL property. I’m now checking the pinout and RPE footprint against it.
Worked for 7 mins 37 sec
Created a project doc
Part Information Review — LMR36503RFRPER
Date: 2026-07-22 Current Flux part/project: silicon-yard/lmr36503rfrper
Completed the review and updated the part’s Datasheet URL to the official TI datasheet. I created the detailed findings in Part Information Review — LMR36503RFRPER.
Open items:
- The part exposes 13 terminals, but TI defines LMR36503RFRPER as a 9-pin RPE/VQFN-HR package.
- Pins 10–13 appear to be segmented footprint copper exposed as independent schematic pins.
- Pin types/descriptions are incomplete, and I filed an internal part-quality report.
Suggested next steps:
- Remap the symbol to the 9 datasheet pins.
- Tie segmented footprint copper to the correct real pins.
- Populate pin types/descriptions from TI Table 6-1.
Fix and verify part
Fix pin mapping
Populate pin metadata
Run design checks
Check BOM metadata
Refine this doc
Ask about this doc
Part Information Review — LMR36503RFRPER
Date: 2026-07-22
Sources Checked
- Current Flux part/project:
silicon-yard/lmr36503rfrper - Official TI datasheet: https://www.ti.com/lit/ds/symlink/lmr36503.pdf
- TI orderable part page: https://www.ti.com/product/LMR36503/part-details/LMR36503RFRPER
Current Flux Part Information
Table
| Field | Current value |
|---|---|
| Name / MPN | LMR36503RFRPER |
| Manufacturer | Texas Instruments |
| Datasheet URL | Updated to https://www.ti.com/lit/ds/symlink/lmr36503.pdf |
| Designator prefix | IC |
| Part type | Integrated Circuit |
| Library terminal count | 13 |
| Package / case code | VQFN |
| Description | Ultra-low-IQ synchronous buck converter description present in library metadata; original project description/name is LMR36503RFRPER. |
| Schematic terminals | RT_1, PGOOD, EN/UVLO, VIN_1, SW_1, BOOT, VCC, FB_1, GND, RT_2, VIN_2, SW_2, FB_2 |
| Pin types / pin descriptions | All inspected terminal Pin Type values are Unspecified; detailed pin descriptions are not populated. |
| Footprint asset | KiCad module named LMR36506MSC5RPERQ1, described as RPE0009A, with 13 copper pad shapes. |
| 3D model asset | LMR36503RFRPER.stp |
Official TI Key Specs
Table
| Spec | Datasheet / TI value |
|---|---|
| Device family | LMR36503 |
| Function | 3-V to 65-V, 0.3-A ultra-small synchronous step-down buck converter |
| Orderable part | LMR36503RFRPER |
| Output option | Adjustable output |
| Input voltage | 3.0 V falling threshold to 65 V; recommended operating range after startup 3.6 V to 65 V |
| Transient input protection | Up to 70 V |
| Output current | 0 A to 0.3 A |
| Switching frequency | Adjustable with RT resistor, 200 kHz to 2.2 MHz |
| Light-load mode | No external sync; default FPWM at light load for this orderable option |
| Spread spectrum | No |
| Wettable flanks | Yes |
| Package | VQFN-HR, package drawing RPE |
| Pin count | 9 |
| Body size | 2.00 mm × 2.00 mm nominal |
| Package height | 1.0 mm max |
| Operating junction temperature | −40°C to +150°C |
| Part marking | MC05 |
| Reel quantity | 3000, large tape and reel |
Official TI Pinout
For LMR36503RFRPER, pin 8 is the adjustable-output feedback pin (
FB).Table
| Pin | Name | Type from datasheet | Datasheet function |
|---|---|---|---|
| 1 | RT | Analog | Frequency-programming pin for RT variant; do not float. |
| 2 | PGOOD | Analog / open-drain output | Power-good flag; pull up through a resistor; may be open or grounded if unused. |
| 3 | EN/UVLO | Analog input | Enable / undervoltage lockout input; high = on, low = off; do not float. |
| 4 | VIN | Power | Regulator input supply; bypass directly to GND. |
| 5 | SW | Power | Switch node; connect to power inductor. |
| 6 | BOOT | Power | Bootstrap supply; connect 100 nF from BOOT to SW. |
| 7 | VCC | Power | Internal LDO output; 1 µF to GND; do not load externally except allowed PGOOD pull-up use. |
| 8 | FB | Analog | Adjustable-output feedback divider tap; do not float. |
| 9 | GND | Ground | Power ground; connect to system ground and input capacitor with short, wide traces. |
Symbol and Pin Description Cross-Check
Table
| Check | Result |
|---|---|
| Pin count | Mismatch — Flux exposes 13 terminals; TI defines a 9-pin package. |
| Pins 1–9 names | Mostly match the datasheet function names, with suffixes on repeated names (RT_1, VIN_1, SW_1, FB_1). |
| Extra pins 10–13 | Mismatch — TI does not define pins 10–13. Current extra terminals are RT_2, VIN_2, SW_2, and FB_2. These appear to come from segmented copper land shapes, not separate electrical pins. |
| Pin 8 naming | Acceptable as FB_1 for this adjustable orderable option, but the final logical pin should be named FB rather than a suffixed duplicate. |
| Pin types | Incomplete — all inspected terminal Pin Type properties are Unspecified; they should be assigned from the datasheet. |
| Pin descriptions | Incomplete — functional descriptions from Table 6-1 are missing. |
Footprint Cross-Check
The current footprint contains 13 copper pad shapes. TI’s RPE VQFN-HR land-pattern drawing also shows segmented copper lands, so the copper geometry appears broadly consistent with the RPE land pattern dimensions:
- Body / outline: 2 mm × 2 mm nominal, matching RPE.
- Main outer pad sizes/positions resemble TI example board layout values: 0.225 mm × 0.75 mm, 0.25 mm × 0.6 mm, central GND land around 0.35 mm × 1.3 mm, and four small 0.35 mm × 0.4 mm segmented lands.
- The issue is the logical/electrical mapping, not necessarily the copper artwork.
Important footprint findings:
- Logical pad count mismatch: the footprint exposes copper lands as pads 1–13, while the datasheet electrical pin table defines only pins 1–9.
- Likely intended mapping: extra copper lands 10–13 likely should be tied/mapped to the corresponding real package pins, not represented as independent schematic pins:
- Pad 10 /
RT_2→ likely same electrical node as pin 1RT - Pad 11 /
VIN_2→ likely same electrical node as pin 4VIN - Pad 12 /
SW_2→ likely same electrical node as pin 5SW - Pad 13 /
FB_2→ likely same electrical node as pin 8FB
- Pad 10 /
- Footprint naming concern: footprint asset name references
LMR36506MSC5RPERQ1, notLMR36503RFRPER. It may be footprint-compatible, but the naming is confusing and should be corrected or explicitly documented.
Flags / Mismatches
- High severity: Part terminal count is 13, but official TI package is 9-pin.
- High severity: Schematic symbol exposes non-datasheet pins 10–13 as independent electrical terminals.
- Medium severity: Pin types are all unspecified.
- Medium severity: Pin descriptions from the datasheet are missing.
- Low/medium severity: Part subtype metadata appears generic/inaccurate (
Logic/ANDin library metadata) for a buck regulator; should be Power Management / DC-DC buck converter. - Low severity: Footprint asset name references a different TI family/orderable variant (
LMR36506...Q1), though geometry appears compatible with RPE.
Recommended Remediation
- Keep the Datasheet URL as
https://www.ti.com/lit/ds/symlink/lmr36503.pdf. - Change the logical symbol to expose only the 9 datasheet pins:
RT,PGOOD,EN/UVLO,VIN,SW,BOOT,VCC,FB,GND. - Preserve segmented footprint copper if it matches TI RPE land pattern, but map extra copper shapes to the corresponding real pins instead of exposing pins 10–13.
- Populate Pin Type and Pin Description properties from TI Table 6-1.
- Update part classification to a power-management / DC-DC buck converter rather than generic logic.
- Rename or document the footprint asset to avoid implying the wrong MPN.
Internal Follow-Up
An internal Flux part-quality report was filed for the terminal-count and pin-mapping issue.
Sources Checked
Current Flux Part Information
Official TI Key Specs
Official TI Pinout
Symbol and Pin Description Cross-Check
Footprint Cross-Check
Flags / Mismatches
Recommended Remediation
Internal Follow-Up
