LIS2DU12 Part Review


I’ll verify the current part metadata, locate and query the official ST datasheet, compare every symbol pin and footprint pad/land-pattern dimension, correct the datasheet property, then record the audit and any mismatches.
The official ST source is identified. The 12 pin numbers/names match the datasheet, while the stored manufacturer, datasheet link, description ODR range, and symbol electrical metadata need correction or qualification; I’m applying the metadata fixes and documenting the footprint comparison now.
Created a project doc

Part Audit

View Document

Part Audit Scope
Review of LIS2DU12TR project metadata, schematic symbol, PCB footprint, and available 3D-model metadata against STMicroelectronics LIS2DU12 datasheet DS12422 Rev. 7 (May 2025).
Part information Key specifications
  • Supply: VDD 1.62 to 3.6 V; independent VDD_IO supply.
Reviewed the LIS2DU12TR metadata, all 12 symbol pins, footprint geometry, and model metadata. I updated the manufacturer to STMicroelectronics, set the official ST datasheet URL, added the LGA-12L package, and corrected the description to 1.6–800 Hz ODR.
Flagged issues
  • All symbol electrical pin types are unspecified and pin descriptions are missing.
  • Footprint is incorrectly tagged through_hole despite using SMD pads.
  • Exact mask/paste compliance still needs validation against ST TN0018.
  • Pin-1 visibility and STEP-model alignment should be visually confirmed.
Full results: Part Audit.

Part Audit
Scope
Review of LIS2DU12TR project metadata, schematic symbol, PCB footprint, and available 3D-model metadata against STMicroelectronics LIS2DU12 datasheet DS12422 Rev. 7 (May 2025).
Part information

Table


FieldReviewed valueStatus
Manufacturer part numberLIS2DU12TRMatch
ManufacturerSTMicroelectronicsCorrected; previously incorrectly set to LIS2DU12TR
Part typeSensorAcceptable
FunctionUltralow-power 3-axis digital accelerometer with antialiasing and motion detectionMatch
PackageLGA-12L, 2.0 x 2.0 x 0.74 mm maxMatch; package property added
Pin count12Match
PackingTape and reel (TR)Match
Temperature range-40 to +85 CMatch datasheet
Datasheet propertyOfficial ST PDF URLCorrected; previously pointed to SnapEDA
Key specifications
  • Supply: VDD 1.62 to 3.6 V; independent VDD_IO supply.
  • Measurement ranges: +/-2 g, +/-4 g, +/-8 g, +/-16 g.
  • Output data rate: 1.6 Hz to 800 Hz.
  • Digital interfaces: I2C, SPI (3-wire/4-wire), and MIPI I3C.
  • Normal-mode current: approximately 6.1 uA at the stated datasheet condition; ultralow-power mode approximately 0.47 uA; power-down approximately 0.02 uA.
  • Integrated temperature sensor, self-test, motion/event detection, and FIFO.
  • Package: 12-lead LGA, nominal 2.0 x 2.0 mm, 0.74 mm maximum height.
Symbol pin cross-check
All 12 symbol pin numbers and names map to the datasheet correctly:

Table


PinSymbol nameDatasheet functionResult
1SCL/SPCI2C/I3C clock or SPI clockMatch
2CSSPI versus I2C/I3C mode selection; internal pull-upMatch
3SDO/SA0SPI data output or I2C address bit; internal pull-upMatch
4SDA/SDI/SDOI2C/I3C data, SPI input, or 3-wire SPI outputMatch
5NCInternally unconnected; may be tied to VDD, VDD_IO, or GNDMatch
6GNDGroundMatch
7RESMust connect to GNDMatch
8GNDGroundMatch
9VDDMain supplyMatch
10VDD_IOI/O supplyMatch
11INT2Interrupt 2; optional clock input for on-demand conversion; internal pull-downMatch
12INT1Interrupt 1; internal pull-downMatch
Symbol mismatches / weaknesses
  1. Every terminal currently has Pin Type=Unspecified. This loses ERC direction and power semantics. Suggested classifications are: pins 1 and 2 input; pin 3 bidirectional; pin 4 bidirectional; pin 5 passive/no-connect; pins 6 and 8 ground/power input; pin 7 power/passive ground-required; pins 9 and 10 power input; pin 11 bidirectional or output/input; pin 12 output.
  2. Pin descriptions are not populated with the datasheet functions or internal pull-up/pull-down notes.
  3. RES is correctly named but the symbol metadata does not state the mandatory GND connection.
  4. The project uses a parametric symbol, but Pin Group, Pin Orientation, and Terminal Order metadata are absent. The rendered pin positions exist, but organization metadata is incomplete.
Footprint cross-check
Current footprint
  • Asset: FLIS2DU12TR
  • Footprint value: LGA-12L_LIS2DU12_STM
  • 12 rectangular SMD pads.
  • Pad pitch: 0.50 mm.
  • Pad size: 0.2794 x 0.3048 mm, rotated as needed around the perimeter.
  • Pad centers are at approximately +/-0.8001 mm on the outer axis and -0.75/-0.25/+0.25/+0.75 mm on the sequenced axis.
  • Fabrication outline is approximately 2.1082 x 2.1082 mm; silkscreen outline is approximately 2.07 x 2.10 mm.
  • STEP asset: LGA-12L_LIS2DU12_STM.step.
Footprint result
  • Pad count and pad-to-pin mapping match the symbol and datasheet.
  • The 0.50 mm pitch matches the package drawing.
  • Land dimensions are close to the package terminal dimensions and appear plausible for soldering, but the LIS2DU12 datasheet delegates the authoritative PCB land pattern and soldering guidance to ST TN0018. Therefore, exact copper, mask, and paste compliance is not fully verified from DS12422 alone.
  • The footprint's KiCad attribute is through_hole even though all twelve pads are SMD. This is a footprint metadata mismatch and should be changed to an SMD attribute in the source footprint.
  • Pin-1 marking is not robustly verified. A hidden fabrication * exists and the silkscreen is asymmetric, but a clearly visible, unambiguous pin-1 marker should be confirmed visually before publishing.
  • The 3D model is linked, but its computed package-size metadata is zero, so dimensional/model alignment could not be proven from metadata alone.
Corrective actions applied
  • Datasheet URL changed from the SnapEDA landing page to the official ST PDF.
  • Manufacturer changed from LIS2DU12TR to STMicroelectronics.
  • Package/case metadata added as LGA-12L 2.0x2.0x0.74 mm.
  • Project description corrected from 0.8-400 Hz to the current 1.6-800 Hz ODR range and expanded with interfaces/package.
Open recommendations
  1. Populate terminal Pin Type and Pin Description properties using the table above.
  2. Add Pin Group, Pin Orientation, and Terminal Order metadata for a deterministic parametric symbol.
  3. Correct the footprint source attribute from through-hole to SMD.
  4. Validate copper, solder-mask, and paste dimensions against the latest ST TN0018 guidance.
  5. Confirm the visible pin-1 marker and inspect STEP-to-pad alignment in 3D before publishing the part.
  • Scope

  • Part information

  • Key specifications

  • Symbol pin cross-check

  • Symbol mismatches / weaknesses

  • Footprint cross-check

  • Current footprint

  • Footprint result

  • Corrective actions applied

  • Open recommendations