Summary: the 32 SG32 package pins match the official Lattice MachXO2-1200 pinout, and the footprint has 32 perimeter pads plus EP. Main issues flagged: pin types/descriptions are mostly unpopulated, package metadata is too generic, and the existing datasheet URL is official but should ideally be updated to the stable HTTPS Lattice document link.
I’ll update each terminal’s Pin Description and Pin Type using the official MachXO2-1200 SG32 pinout mapping, then re-read the schematic to verify the properties were applied.
The first update applied, but Flux flagged the pin-type strings as non-standard, so I’m normalizing them to the platform’s standard Pin Type values now.
Populated and verified all 33 terminal entries: the 32 SG32 package pins now have official MachXO2-1200 pin descriptions, and the exposed pad is described as the thermal/ground pad.
I also normalized Pin Type values to Flux-standard enums: FPGA I/O/config/JTAG pins are Bi-Directional, VCC/VCCIO pins are Power In, and GND/EP are Ground.