ESP32 Part Audit
Worked for 1 min 23 sec
Audit result: Failed datasheet conformance
No project data was mutated. Audited all project properties, all 47 terminals, the symbol pin table, and all 57 PCB nodes/rules against Espressif ESP32-WROOM-32E/32UE Datasheet v2.0.
Correct items
- MPN:
ESP32-WROOM-32E-N8R2— correct ordering code. - Manufacturer:
Espressif— substantially correct; official corporate naming is Espressif Systems. - Variant: Datasheet Table 1 confirms:
- 8 MB Quad-SPI flash
- 2 MB Quad-SPI PSRAM integrated in the chip package
- PCB antenna
- −40…+85 °C ambient range
- 18.0 × 25.5 × 3.1 mm module
- Pins 1–38: Numbers and primary names correspond to Table 3. The assignments of NC pins 17–22 and 32 are correct.
- Peripheral land pads 1–38: Geometry is broadly consistent with Figure 13:
- 0.9 × 1.5 mm pads
- 1.27 mm pitch
- module outline represented as 18 × 25.5 mm
- A STEP model is attached and referenced.
The module has 38 castellated module pins per Table 3. The project adds:
- 39
GND_4 - 40
GND_5 - …
- 47
GND_12
These correspond spatially to the nine 0.9 × 0.9 mm squares in the central 3 × 3 footprint array. They are not nine physical or logical module terminals.
The datasheet separately refers to the central exposed ground area as “EPAD Pin 39” and notes that soldering it to base-board ground is optional. Therefore:
- A library model may reasonably expose one additional logical GND/EPAD terminal numbered 39.
- It must not expose nine independently numbered logical pins 39–47.
- If paste/copper subdivision is desired, every subdivision must belong to the same logical EPAD/GND pin 39, not become new pins.
Thus, the current 47-terminal model is erroneous and will create false schematic/BOM/netlist semantics.
2. Central EPAD land pattern is not the datasheet pattern
Current footprint:
- Nine separate SMD copper pads, numbered 39–47
- Each pad is 0.9 × 0.9 mm
- 0.5 mm gaps; total array envelope is approximately 3.7 × 3.7 mm
- No plated thermal vias or holes are present
Figure 13 specifies a central 3.7 × 3.7 mm thermal/ground copper area and identifies 0.5 mm vias for the thermal pad. The project appears to have mistaken a paste/via subdivision concept for nine separate copper terminals.
Exact problems:
- Fragmented copper rather than a single EPAD copper connection
- No 0.5 mm thermal vias
- Nine unique pad numbers instead of one EPAD number
- No explicit EPAD-to-GND grouping
- No explicit antenna keepout/copper restriction geometry in the footprint
Every terminal has
Pin Type=Unspecified. Table 3 supplies types:- Power: pins 1, 2, 15, 38; EPAD 39 if represented
- Input: EN 3; SENSOR_VP 4; SENSOR_VN 5; IO34 6; IO35 7
- Bidirectional: GPIO/interface pins 8–14, 16, 23–31, 33–37
- Not Connected: 17–22 and 32
Consequently, power-direction and NC-aware ERC behavior is unavailable.
4. Terminal functions/descriptions are completely absent
None of the 47 terminals contains a pin description/function. Missing information includes all Table 3 alternate functions, for example:
- SENSOR_VP: GPIO36, ADC1_CH0, RTC_GPIO0
- SENSOR_VN: GPIO39, ADC1_CH3, RTC_GPIO3
- IO32/IO33: 32.768 kHz crystal, ADC, touch and RTC functions
- RXD0/TXD0: GPIO3/U0RXD and GPIO1/U0TXD
- EN: must not float; high enables, low shuts down
No sections, pin groups, bus groups, terminal ordering metadata, or functional grouping are populated.
5. N8R2 IO16 restriction is dangerously omitted
Pin 27 is presented simply as
IO16, with Pin Type=Unspecified and no warning.For embedded-QSPI-PSRAM variants such as N8R2, Table 3 note 3 and Figure 9 state:
- IO16 is connected internally to embedded PSRAM.
- It cannot be used for other functions/GPIO.
- Figure 9 further states that IO16 should be pulled up.
The current symbol invites users to treat IO16 as an ordinary available GPIO. This is a functional design hazard. It should be marked reserved/PSRAM-connected or otherwise made unmistakably unavailable, with the restriction in its description.
Naming and metadata issues
Terminal names
Pins 1–38 are electrically mapped correctly, but repeated official names were altered:
GNDbecameGND_1,GND_2,GND_3NCbecameNC_1…NC_7
Unique internal designators may be necessary, but the user-visible pin name should remain the official
Project metadata present
GND or NC, with uniqueness handled separately.Only these properties exist:
- Designator Prefix:
IC - Part Type:
Integrated Circuits - MPN
- Datasheet URL
- Manufacturer Name
- Package/module type: ESP32-WROOM-32E module
- Package dimensions: 18.0 × 25.5 × 3.1 mm
- Operating voltage: 3.0–3.6 V, 3.3 V typical
- Minimum external supply capability: 0.5 A
- Operating temperature: −40…+85 °C
- Flash: 8 MB Quad SPI
- PSRAM: 2 MB Quad SPI, integrated in ESP32-D0WDR2-V3 package
- Antenna: onboard PCB antenna
- Wi-Fi/Bluetooth characteristics
- Mount: SMD castellated module
- Terminal count semantics: 38 edge pins plus optional single EPAD 39
- Explicit N8R2/IO16 restriction
- Package/body dimensions are also absent from parametric footprint properties: computed
packageSizeis zero.
The project description is generic and does not mention the exact N8R2 memory configuration or IO16 limitation.
Other footprint observations
- Fab outline correctly describes an 18 × 25.5 mm body.
- Courtyard is approximately 21 × 28 mm.
- Reference/value text is centered over the module body and uses an unusually large 1.27 mm stroke width, equal to its font size; this is likely an imported-rule error and is not manufacturable as ordinary silkscreen text.
- No dedicated antenna-area keepout rule is present, despite Figure 13 identifying the antenna area and Section 11 requiring layout attention there.
- The central EPAD geometry is offset according to the imported footprint and has the correct approximate 3.7 mm envelope, but its electrical and physical implementation is incorrect.
- Table 1: N8R2 = 8 MB flash, 2 MB PSRAM, −40…85 °C, 18 × 25.5 × 3.1 mm.
- Table 3: “The module has 38 pins”; NC at 17–22 and 32.
- Table 3 note 3: IO16 is occupied by embedded QSPI PSRAM and cannot be used for other functions.
- Figure 9: IO16 should be pulled up on embedded-PSRAM variants; central land is referred to as EPAD Pin 39.
- Figure 10: 18 ±0.15 × 25.5 ±0.15 × 3.1 ±0.15 mm.
- Figure 13: 0.9 × 1.5 mm perimeter lands on 1.27 mm pitch, central thermal/ground land and 0.5 mm thermal vias.
- Table 14: 3.0–3.6 V supply; external supply capability at least 0.5 A.
Conclusion: The 1–38 pin-number/name mapping and outer-pad geometry are largely correct, but the part is not safe to publish/use as-is because of the nine false logical GND terminals, incorrect EPAD implementation, absent electrical types/functions, and missing N8R2 IO16 restriction.
Thought for 11 sec
Audit completed against Espressif’s official ESP32-WROOM-32E/32UE datasheet v2.0. The existing Datasheet URL was already populated, so it was not changed.
- Correct: MPN, N8R2 configuration (8 MB flash/2 MB PSRAM), pins 1–38, NC assignments, 18 × 25.5 × 3.1 mm outline, and outer pad pitch/size.
- Critical mismatches: 47 logical pins instead of 38 plus optional EPAD 39; center 3×3 pads are incorrectly numbered 39–47 rather than sharing EPAD/GND 39; missing thermal vias and antenna keepout; all pin types and descriptions are unspecified; IO16 is not identified as reserved for embedded PSRAM and unavailable as GPIO.
- Missing metadata: package, voltage (3.0–3.6 V), ≥0.5 A supply requirement, −40…85 °C range, memory, antenna, wireless specifications, and module mounting type.
The part is not safe to publish or use as-is. I filed an internal part-quality report; no design changes were made.
Fix and document part
Correct footprint
Add antenna keepout
Create audit report
Run review after fixes
