ES9822QPRO Review


Distribute all pins approximately evenly between the Left and Right sides of the schematic symbol.
Place power pins at the Top and first in Terminal Order. Place GND pins at the Bottom, Left, or Right and last in Terminal Order.
Keep related pins together, balance the symbol, and do not change pin names, numbers, or mapping.
I’ll rebalance the existing symbol metadata only: keep power at top/order first, keep GND/EPAD last, and split the remaining functional groups roughly evenly left/right without changing names, numbers, or mappings.
Rebalanced the symbol metadata while preserving all pin names, numbers, and mappings. The non-power/non-ground pins are now split approximately evenly: 14 Left and 15 Right, with power pins Top/orders 1–7 and GND/EPAD Bottom/orders 37–41.
Open items:
  • None for this requested metadata change.
Suggested next steps:
  1. Review the rendered symbol for visual spacing.
  2. Optionally correct labels for pin 40 (RT1) and pin 41 (EPAD) in a separate pass.
Fix labels and review
Correct pin labels
Populate pin metadata
Run ERC review
Check symbol layout

5 · AVCC10 · AVCC_L21 · AVCC_R9 · VREF_L22 · VREF_R29 · DVDD30 · AVDD4 · ACLK8 · XINXOUT · 712 · IN_P113 · IN_M1IN_P2 · 19IN_M2 · 183 · MODECHIP_EN · 23DGND_2 · 4025 · MOSI/SDA26 · SCLK/SCLSS/ADDR1 · 27MISO/ADDR2 · 281 · GPIO102 · GPIO1124 · GPIO932 · GPIO833 · GPIO7GPIO6 · 34GPIO5 · 35GPIO4 · 36GPIO3 · 37GPIO2 · 38GPIO1 · 3914 · NC_115 · NC_2NC_3 · 16NC_4 · 17AGND · 6AGND_L · 11AGND_R · 20DGND_1 · 31DGND_3 · 41

ES9822QPRO

ES9822QPRO thumbnail