Part Datasheet Audit


Grouped and verified all 39 pins with no duplicates:
  • Power: 9 pins
  • Ground: 6 pins
  • GPIO: 19 pins
  • Control: 2 pins
  • Clock: 2 pins
  • RF: 1 pin
Each pin’s Section matches its Pin Group. Power is oriented top, Ground bottom, GPIO left, and Control/Clock/RF right; pin names and ball numbers remain unchanged.
  • Make the functional group more general.
  • Add a Section property to all pins, and apply the same value used in the Pin Group property to each pin's Section property.
Assign a Terminal Order from 1 to 10, starting with Power. Power should be Terminal Order 1, and Ground should be last, Terminal Order 10. For Orientation, set Power to "Top" and Ground to "Bottom." For the remaining sections/groups, you may decide the Terminal Order and Orientation yourself. For Orientation, distribute them between "Left" and "Right" — don't put everything on one side. Each group/section should have a different orientation.
I’ll generalize the remaining signal groups, keep Section identical to Pin Group on every pin, and redistribute the non-power groups across left and right while preserving Power=1/Top and Ground=10/Bottom.
Updated and verified all pins:
  • Power — Order 1, Top
  • Control — Order 3, Right
  • Digital I/O — Order 5, Left
  • Clock — Order 7, Left
  • Analog / RF — Order 8, Right
  • Ground — Order 10, Bottom
Every pin now has a Section matching its Pin Group, with non-power groups distributed across both left and right sides. Pin assignments remain exclusive.
Fix metadata and verify
Use known group values
Add pin descriptions
Review symbol layout
Check footprint details

Name
Pin #
Type
Section
Pin Group
Orientation
Order
Sub-symbol
VREGSW
A1
Unspecified
Power
Power
Top
1
VREGVDD
A2
Unspecified
Power
Power
Top
1
VREGVSS
A3
Unspecified
Ground
Ground
Bottom
10
DVDD
A4
Unspecified
Power
Power
Top
1
PD01
A5
Unspecified
Digital I/O
Digital I/O
Left
5
PD00
A6
Unspecified
Digital I/O
Digital I/O
Left
5
DECOUPLE
B1
Unspecified
Power
Power
Top
1
IOVDD
B3
Unspecified
Power
Power
Top
1
AVDD
B4
Unspecified
Power
Power
Top
1
PC01
B5
Unspecified
Digital I/O
Digital I/O
Left
5
PC02
B6
Unspecified
Digital I/O
Digital I/O
Left
5
VBAT
C1
Unspecified
Power
Power
Top
1
BOOST_EN
C2
Unspecified
Control
Control
Right
3
PA06
C3
Unspecified
Digital I/O
Digital I/O
Left
5
PC00
C4
Unspecified
Digital I/O
Digital I/O
Left
5
PC03
C5
Unspecified
Digital I/O
Digital I/O
Left
5
PC05
C6
Unspecified
Digital I/O
Digital I/O
Left
5
PA02
D1
Unspecified
Digital I/O
Digital I/O
Left
5
PA03
D2
Unspecified
Digital I/O
Digital I/O
Left
5
PA04
D3
Unspecified
Digital I/O
Digital I/O
Left
5
PA05
D4
Unspecified
Digital I/O
Digital I/O
Left
5
PC04
D5
Unspecified
Digital I/O
Digital I/O
Left
5
PC06
D6
Unspecified
Digital I/O
Digital I/O
Left
5

EFR32BG27C320F768GJ39-B