ATWILC3000 Pin Review


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ATWILC3000-MR110CA Part Review

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Date: 2026-07-23 Official Microchip datasheet used for review: ATWILC3000 Wi-Fi® Link Controller Module Data Sheet, DS70005327
Completed the ATWILC3000-MR110CA datasheet review and grouped every pin into one primary function with no duplicated physical pins. I also populated pin descriptions/types and created the detailed report here: ATWILC3000-MR110CA Part Review.
Open items:
  • Pin 34/35 labels appear swapped versus the Microchip datasheet: pin 34 should be GPIO21, pin 35 should be GPIO0.
  • Pin 37 is electrically correct as ground, but naming it PADDLE / PADDLE/VSS would better match the datasheet.
  • The stored datasheet URL is readable but appears to use HTTP; the HTTPS Microchip URL is preferable.
Suggested next steps:
  1. Rename/swap the pin 34 and pin 35 terminal labels.
  2. Rename pin 37 to make the exposed paddle explicit.
  3. Normalize pin 23 naming to SD_CMD/SPI_SCK.
  • Make the functional group more general.
  • Add a Section property to all pins, and apply the same value used in the Pin Group property to each pin's Section property.
Assign a Terminal Order from 1 to 10, starting with Power. Power should be Terminal Order 1, and Ground should be last, Terminal Order 10. For Orientation, set Power to "Top" and Ground to "Bottom." For the remaining sections/groups, you may decide the Terminal Order and Orientation yourself. For Orientation, distribute them between "Left" and "Right" — don't put everything on one side. Each group/section should have a different orientation.
I’ll generalize the pin groups, mirror each group into Section, and rebalance Terminal Order/Orientation with Power at top/order 1 and Ground bottom/order 10.
Updated all pins as requested.
Open items:
  • None for this grouping pass.
  • Existing pin-description note remains: pin 34/35 labels still appear swapped versus the datasheet, but I did not rename pins because this request was only for grouping/section/order/orientation.
Suggested next steps:
  1. Rename/swap pin 34 and pin 35 labels to match the datasheet.
  2. Rename pin 37 to PADDLE or PADDLE/VSS.
  3. Review the generated symbol visually and adjust left/right balance if you want a different layout.
Fix pin labels
Swap GPIO labels
Rename paddle pin
Normalize SD pin
Review symbol layout

BT_RXD
Pin Number
9
GPIO18
Pin Number
30
IRQN
Pin Number
33
GND_6
Pin Number
37
GPIO0
Pin Number
34
SDIO/SPI_CFG
Pin Number
2
GND_1
Pin Number
1
CHIP_EN
Pin Number
19
GPIO4
Pin Number
15
GPIO19
Pin Number
31
N/C_2
Pin Number
4
GND_4
Pin Number
28
GPIO3
Pin Number
14
BT_TXD
Pin Number
8
GND_5
Pin Number
36
RESETN
Pin Number
7
GPIO20
Pin Number
32
UART_TXD
Pin Number
16
BT_CTS/I2C_SCL_S
Pin Number
11
GND_2
Pin Number
13
SD_CLK/GPIO8
Pin Number
22
SD_DAT3/GPIO7
Pin Number
27
SD_DAT1/SPI_SSN
Pin Number
25
GPIO21
Pin Number
35
GND_3
Pin Number
21
SD_DAT2/SPI_MOSI
Pin Number
26
GPIO17
Pin Number
29
RTC_CLK
Pin Number
20
N/C_3
Pin Number
5
BT_RTS/I2C_SDA_S
Pin Number
10
N/C_1
Pin Number
3
SD_DAT0/SPI_MISO
Pin Number
24
VDDIO
Pin Number
12
UART_RXD
Pin Number
17
VBAT
Pin Number
18
SD_CMD_SPI_SCK
Pin Number
23
N/C_4
Pin Number
6
Name
Pin #
Type
Part Type
Pin Description
Pin Group
GND_1
1
Ground
Terminal
Ground
Ground
SDIO/SPI_CFG
2
Input
Terminal
Interface select: connect to VDDIO through 1 MΩ to enable SPI; connect to GND to enable SDIO
Control
N/C_1
3
Not Connected
Terminal
No connection
NC
N/C_2
4
Not Connected
Terminal
No connection
NC
N/C_3
5
Not Connected
Terminal
No connection
NC
N/C_4
6
Not Connected
Terminal
No connection
NC
RESETN
7
Input
Terminal
Active-low hard reset input; asserted low resets module, high allows normal operation; host output should default low at power-up or use 1 MΩ pulldown if tri-stated
Control
BT_TXD
8
Bi-Directional
Terminal
Bluetooth UART transmit data output; connect to host UART_RXD
UART
BT_RXD
9
Bi-Directional
Terminal
Bluetooth UART receive data input; connect to host UART_TXD
UART
BT_RTS/I2C_SDA_S
10
Bi-Directional
Terminal
I2C client data for debug development; recommended test point; default I2C, or UART RTS if flow control is enabled
UART
BT_CTS/I2C_SCL_S
11
Bi-Directional
Terminal
I2C client clock for debug development; recommended test point; default I2C, or UART CTS if flow control is enabled
UART
VDDIO
12
Power In
Terminal
Digital I/O power supply
Power
GND_2
13
Ground
Terminal
Ground
Ground
GPIO3
14
Bi-Directional
Terminal
GPIO_3; GPIO functionality not supported by current firmware per datasheet note
GPIO
GPIO4
15
Bi-Directional
Terminal
GPIO_4; GPIO functionality not supported by current firmware per datasheet note
GPIO
UART_TXD
16
Bi-Directional
Terminal
Wi-Fi UART TxD output for debug development; recommended test point
UART
UART_RXD
17
Bi-Directional
Terminal
Wi-Fi UART RxD input for debug development; recommended test point
UART
VBAT
18
Power In
Terminal
Power supply pin for DC/DC converter and power amplifier
Power
CHIP_EN
19
Input
Terminal
PMU enable; high enables module, low enters Power-Down; host output should default low at power-up or use 1 MΩ pulldown if tri-stated
Control
RTC_CLK
20
Bi-Directional
Terminal
RTC clock input; connect to a 32.768 kHz clock source
Clock
GND_3
21
Ground
Terminal
Ground
Ground
SD_CLK/GPIO8
22
Bi-Directional
Terminal
SDIO clock line when configured for SDIO; also GPIO8 function in pin name
Interface
SD_CMD_SPI_SCK
23
Bi-Directional
Terminal
SDIO CMD line when configured for SDIO; SPI clock when configured for SPI
Interface

ATWILC3000-MR110CA