Part Audit Review


Organized all 56 terminals into eight groups: Power, Antenna/RF, Control/Debug, Clock, NFC, USB, GPIO, and Ground.
  • Section matches Pin Group on every terminal.
  • Power is Top; Ground is Bottom; other groups are consistently Left or Right.
  • Terminal orders are unique and deterministic within each group.
  • Pin numbers, names, electrical types, and footprint mappings were preserved and verified.
Check this schematic component against the datasheet for [MPN] and assign the correct pin orientation, section, and terminal order without changing, replacing, renumbering, or remapping any pins. Remove the Pin Group property from all pins if it exists. Place Power pins first and Ground pins last. Within each section, distribute the pins as evenly as possible between the left and right sides; for example, split 10 pins as 5/5 and 11 pins as 5/6 or 6/5. If a section contains only one pin, leave it on the most appropriate side. Keep the symbol compact, balanced, and visually symmetrical. If a pin function is unclear, assign Unclear / Check datasheet, then apply all changes directly to the schematic component.
I’ll re-check the ANNA-B402-00B pin table, remove Pin Group from every terminal, then assign datasheet-based sections, balanced left/right orientations, and deterministic ordering with Power first and Ground last—without altering any pin identity or mapping.
Updated all 56 ANNA-B402-00B terminals against the official u-blox datasheet.
  • Removed Pin Group from every pin.
  • Assigned datasheet-based sections and globally unique orders 1–56.
  • Power is first; Ground is last.
  • Balanced orientations exactly 28 Left / 28 Right.
  • Preserved all pin names, numbers, types, positions, and footprint mappings.
  • No unclear pin functions were found.
Fix symbol metadata
Add pin descriptions
Correct ground types
Run symbol review
Update audit notes

Name
Pin #
Type
Part Type
Pin Orientation
Section
Terminal Order
ANT_PCB
1
Unspecified
Terminal
Left
Antenna/RF
3
ANT_GND1
2
Power Out
Terminal
Left
Antenna/RF
4
ANT_GND2
3
Power Out
Terminal
Left
Antenna/RF
5
GND
4
Power Out
Terminal
Left
Ground
46
ANT_INT
5
Unspecified
Terminal
Right
Antenna/RF
6
ANT
6
Unspecified
Terminal
Right
Antenna/RF
7
GND
7
Power Out
Terminal
Left
Ground
47
GND
8
Power Out
Terminal
Left
Ground
48
VCC
9
Power In
Terminal
Left
Power
1
GPIO_10
10
Bi-Directional
Terminal
Left
GPIO
18
GPIO_11
11
Bi-Directional
Terminal
Left
GPIO
19
RESET_N
12
Input
Terminal
Left
Control/Debug
8
GPIO_13
13
Bi-Directional
Terminal
Left
GPIO
20
GPIO_14
14
Bi-Directional
Terminal
Left
GPIO
21
GPIO_15
15
Bi-Directional
Terminal
Left
GPIO
22
SWO/GPIO_16
16
Bi-Directional
Terminal
Left
Control/Debug
9
XL1/GPIO_17
17
Bi-Directional
Terminal
Left
Clock
12
XL2/GPIO_18
18
Bi-Directional
Terminal
Right
Clock
13
GPIO_19
19
Bi-Directional
Terminal
Left
GPIO
23
GPIO_20
20
Bi-Directional
Terminal
Left
GPIO
24
VBUS
21
Power In
Terminal
Right
Power
2
NFC1/GPIO_22
22
Bi-Directional
Terminal
Left
NFC
14
NFC2/GPIO_23
23
Bi-Directional
Terminal
Right
NFC
15

ANNA-B402-00B