VCAP capacitors C5/C6: Murata 2.2µF, 16V, X7R, 0805 parts select karya; manufacturer na capacitance/ESR graphs check karya ane VCAP connections alag j rakhya. Details MLCC Qualification Review ma chhe.
Custom Betaflight: actual source sathe BIN/ELF/MAP compile karya, 8MHz oscillator bypass ane PC0-based USB detection integrate karya; mapping checks ane host tests pass thaya. Motors safety mate hard-locked OFF chhe—aa flight-ready firmware nathi. Downloads Firmware Build Results ma chhe.
Haju baki: 39 × 39mm PCB sizing, placement/routing ane hardware tests. Fresh ERC ma 10 errors haju visible chhe; connectivity inspection pramane aa USB external-source ane IMU supply-detection findings chhe, errors suppress karya nathi. Final independent review nu result reconcile karvanu baki chhe. ESC access fari fail thayu, etle tena power stages/routing ma changes nathi karya ane 55A capability verify nathi; aagal mate accessible ESC project no working link joie.
Current VCAP disposition — manual PDF alternative completed
This section supersedes every C5/C6 blocked-selection statement below. COMPLETED prototype documentary selection: C5/C6 now Murata GRM21BR71C225KA12L, nominal2.2uF,16V,±10%,X7R,0805; substitutes disabled. Existing generic instances and nets retained. Library search confirms available distributor stock, but lifecycle signals remain mixed (library Active versus earlier NRND distributor reports); confirm procurement before ordering and do not silently substitute.
Manually inspected manufacturer evidence — NOT indexed citation evidence
Source: manufacturer-authored Murata characteristic sheet, updated2015/12/04, hosted by Octopart: https://datasheet.octopart.com/GRM21BR71C225KA12L-Murata-datasheet-62317294.pdf . Downloaded successfully and inspected using pdftotext and rendered graphs; native indexing remained pending and is not the basis of this selection. PDF SHA256:758487478a0b53d78718003da4b97127e138dc9f3e0201e0c6440e9a5373e61a.
Page1 explicitly lists both L/K packaging codes,2.2uF±10%,16Vdc,X7R±15% over-55to125C,0805 and2.0×1.25×1.25mm each±0.1mm. Page1/2 warn these data are typical and require product specification/approval sheet confirmation before ordering.
Page2 lower-left DC-bias graph is percentage capacitance change versus0–16V,25C/AC1Vrms. At0–2V the curve remains close to0%, inside an approximate visual±5% band, so actual VCAP bias<=1.32V causes only small typical bias change. This is a deliberately broad graph-reading band, not a guaranteed tolerance or combined-condition bound. Nominal times that typical band is about2.09–2.31uF before±10% initial tolerance, temperature, aging and low-AC effects. Do not infer a hard minimum from it.
Page2 upper-left frequency graph: blue R curve (not green |Z|) is ESR at25C versus frequencyMHz. At0.1MHz=100kHz it is near0.01ohm and clearly below0.1ohm, far below ST's<2ohm requirement under those plotted typical conditions. This does not guarantee ESR across all temperatures/frequencies/DC-bias.
ST's indexed requirement remains2.2uF and ESR<2ohm; no effective minimum or capacitance tolerance is invented.
Manufacturer PDF snapshot: murata
Manually inspected page2 curve crop:
bias-esr
Placement handoff and verification
Readback confirms both MPNs,0805,2.2uF16V10%,no substitutes. VCAP1 remains exactly U1+C5; VCAP2 exactly U1+C6; both capacitors'other pins remainGND. No MCU mapping changed. Fresh ERC05:50:25.706Z remains10Errors/0Warnings, the same two IMU supply-inference and eight USB externally driven connector/ground findings; no new electrical category findings returned. Package-property edits commit a schematic/BOM footprint requirement, not PCB placement verification; layout was not edited or inspected in this scope.
The VCAP documentary-selection blocker is CLOSED for prototype placement. Nominal value, small low-voltage typical bias change and low typical ESR support this selection; no guaranteed production envelope is claimed. Proceed to prototype placement, with both0805 footprints accounted for and caps close to their respective VCAP pins/short returns. Conditional hardware validation remains: actual lot/ripple/temperature/aging, VCAP startup and loaded MCU stability, LDO startup/load-step/thermal, USB attach and power-off injection. These are prototype validation tasks, not reasons to hold schematic placement solely pending measurement. Production/flightrelease remains withheld.
Fresh retry — 2026-10-08
FAILED/BLOCKED C5/C6 qualification remains unresolved. The direct Murata characteristic URL returned source_not_found. A web search recovered the manufacturer-authored GRM21BR71C225KA12L characteristic PDF hosted by Octopart; two focused questions (DC-bias retention at2V and ESR100kHz) remained evidence_pending after two300s attempts. Nothing was read for those questions. Do not treat this as missing data, and do not accept distributor FAQ ESR numbers as authoritative component evidence. No MPN, package or capacitance change was made to C5/C6; both remain separate VCAP-to-GND capacitors with connectivity confirmed.
Fresh STM32 extraction confirms2.2uF and ESR<2ohm; no VCAP capacitance tolerance was stated in the retrieved operating-conditions table. A nominal2.2uF label and16V rating alone do not establish effective capacitance or ESR. Obtain manufacturer bias/frequency curves and acceptance limits, or a measured qualification envelope including temperature, low AC stimulus and aging before release. C16–C19 prior typical-derived screen remains conditional, not upgraded to a guarantee by this audit.
Follow-up disposition
COMPLETED selection/configuration: C16, C17, C18, C19 now Murata GRM21BR71C475KE51L, LCSC C408144, 4.7uF,16V,10%,X7R,0805; substitutes disabled. Existing generic instances retained to preserve pins/nets. This supersedes earlier 2.2uF/0603 purchasing instructions for these four only.
FAILED/BLOCKED full production qualification: C16–C19 lack guaranteed combined DC-bias/temperature/aging/low-AC effective-capacitance limits. Typical curves support prototype selection only; layout readiness remains conditional.
FAILED/BLOCKED selection of C5/C6: GRM21BR71C225KA12L researched, but repeated source indexing remained evidence_pending for ESR100kHz and capacitance at1.32V/2V. Nothing was read for these questions; not evidence of missing manufacturer data. Lifecycle reports conflict with library Active and distributor NRND; no MPN or package committed. C5/C6 remain2.2uF0603/16V10% ceramic with ESR<2ohm requirement.
UNATTEMPTED concrete MPN selection on remaining16 capacitors; original generic values and packages retained. No blanket qualification claim for C1–C22.
COMPLETED preserving external5V-only USB-data topology and all MCU interface resources. No firmware, layout placement, routing or rule edits.
Manufacturer evidence and screening calculation
Murata GRM21BR71C475KE51 characteristic sheet shows approximately5.2uF at0V and2.3uF at8V, monotonic decrease from0to8V,25C/1Vrms measurement. It explicitly describes characteristic data as typical, not guaranteed. Rating4.7uF±10%,16V,X7R±15% across-55to125C; dimensions2.0×1.25×1.25mm±0.15mm.
Engineering screen using8V reference above actual bias:4.7uF×(2.3/5.2)×0.90×0.85=1.590uF. This normalizes typical curve retention to nominal rating and applies tolerance/temperature factors; it is NOT a guaranteed worst-case minimum and does not prove independent multiplication of bias/temperature. Approximate curve-reading uncertainty, aging, low ripple AC amplitude, solder history and lot variation remain open.
Selected4.7uF part typical resistance≈0.03ohm at100kHz,0Vdc,25C. This does not guarantee ESR across frequency/temperature/bias. AP2112 typical application uses1uF CIN/COUT and recommendsX7R/X5R; it is described as stable with1uF ceramic. No numerical ESR window or independent guaranteed effective-minimum capacitance was established in this extraction; do not claim such a limit is absent. STM32 specifies2.2uF/ESR<2ohm VCAP and maximum core supply1.32V withVOS=1.
Verification and next gates
Readback confirms all four MPNs/ratings/0805 and unchanged C16/C18 CORE_5V-to-GND, C17 3V3-to-GND, C19 3V3_IMU-to-GND. C5/C6 remain isolated VCAP1/VCAP2-to-GND. Targeted native ERC at2026-10-08T04:46:02.645Z returns two existing U2 VDD/VDDIO missing-power Errors; no floating-pin, driver-conflict or shorted-component findings returned. This is a targeted review, not a full clean-ERC assertion.
Layout placement and footprint geometry remain unverified/outside this batch;0805 package changes require later footprint/overlap/pad-access checks before placement/routing release. Obtain manufacturer effective-capacitance envelope or measure actual assembled capacitors at real DC bias/ripple/temperature and aging; qualify both LDO startup/load-step/short recovery and VCAP behavior. Existing thermal, firmware and connector/mechanical gates still apply.
Current VCAP disposition — manual PDF alternative completed
Manually inspected manufacturer evidence — NOT indexed citation evidence