System On Chip (SOC) IC
It integrates multiple processing units including CPUs, DSPs, AI accelerators, and GPU into a single chip to handle vision processing, deep learning, sensor fusion, and real-time control in automotive and industrial systems.
• C7x floating point, vector DSP, up to 1.0GHz, 80
GFLOPS, 256 GOPS
• Deep-learning matrix multiply accelerator (MMA),
up to 8 TOPS (8b) at 1.0GHz
• Vision Processing Accelerators (VPAC) with Image
Signal Processor (ISP) and multiple vision assist
accelerators
• Depth and Motion Processing Accelerators
(DMPAC)
• Dual 64-bit Arm® Cortex®-A72 microprocessor
subsystem at up to 2.0GHz
– 1MB shared L2 cache per dual-core Cortex®-
A72 cluster
– 32KB L1 DCache and 48KB L1 ICache per
Cortex®-A72 core
• Six Arm® Cortex®-R5F MCUs at up to 1.0GHz
– 16K I-Cache, 16K D-Cache, 64K L2 TCM
– Two Arm® Cortex®-R5F MCUs in isolated MCU
subsystem
– Four Arm® Cortex®-R5F MCUs in general
compute partition
• Two C66x floating point DSP, up to 1.35GHz,
40GFLOPS, 160GOPS
• 3D GPU PowerVR® Rogue 8XE GE8430, up to
750MHz, 96GFLOPS, 6Gpix/sec
• Custom-designed interconnect fabric supporting
near max processing entitlement
Memory subsystem:
• Up to 8MB of on-chip L3 RAM with ECC and
coherency
– ECC error protection
– Shared coherent cache
– Supports internal DMA engine
• External Memory Interface (EMIF) module with
ECC
– Supports LPDDR4 memory types
– Supports speeds up to 4266MT/s
– 32-bit data bus with inline ECC
• General-Purpose Memory Controller (GPMC)
• 512KB on-chip SRAM in MAIN domain, protected
by ECC
#CommonPartsLibrary
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