USB C WiFi BLE Sensor Node
Worked for 7 mins 17 sec
Created 4 project docs
Design Notes — USB-C WiFi BLE Environmental Node
Input: USB-C receptacle J1, 5 V sink-only, USB 2.0 D+/D- routed to ESP32-C3 native USB Serial/JTAG. USB-C configuration: R1/R2 = 5.1 kΩ Rd f...
View docFirmware Starter — ESP32-C3-WROOM-02-N4
MCU/module: ESP32-C3-WROOM-02-N4 Framework: Arduino on PlatformIO
View docBoard Bring-Up Plan — USB-C WiFi BLE Environmental Node
Equipment: current-limited 5 V USB supply or USB power meter, multimeter, oscilloscope, USB-C cable, ESD-safe workstation, PlatformIO firmwa...
View docTechnical Construction File — USB-C WiFi BLE Environmental Node
Draft, schematic-stage. FCC Part 15 intentional radiator integration using pre-certified module conditions.
View docImplemented the schematic for the USB-C powered Wi‑Fi/BLE temperature/humidity node and created the supporting project files:
Open items:
- PCB layout has not been started yet; airwires are expected until placement/routing.
- Generic passives/testpoints still need production MPN assignment before manufacturing export.
- Layout must enforce ESP32 antenna keepout and keep the SHT40 away from heat sources.
Suggested next steps:
- Set board size/stackup and antenna/sensor placement constraints.
- Place components with the ESP32 antenna at the board edge.
- Route USB, buck power, and I2C nets.
- Assign production MPNs for generic passives and test pads.
Create layout constraints
Assign passive MPNs
Run schematic review
Start PCB placement
Prepare layout intent
Refine this doc
Ask about this doc
Design Notes — USB-C WiFi BLE Environmental Node
Architecture Summary
- Input: USB-C receptacle J1, 5 V sink-only, USB 2.0 D+/D- routed to ESP32-C3 native USB Serial/JTAG.
- USB-C configuration: R1/R2 = 5.1 kΩ Rd from CC1/CC2 to GND. No USB PD negotiation.
- Input protection: U1 TPS259530DSGR eFuse between
VBUS_RAWandVBUS_PROT. - Regulation: U2 TPS62821DLCR synchronous buck from
VBUS_PROTto3V3. - MCU/radio: U3 ESP32-C3-WROOM-02-N4, on-board PCB antenna, Wi-Fi 802.11 b/g/n + BLE 5.x.
- Sensor: U4 SHT40-AD1B-R3 I2C temperature/RH sensor at address 0x44.
Power Budget
Table
| Rail | Load | Typical | Peak / Design Current | Notes |
|---|---|---|---|---|
| 3V3 | ESP32-C3-WROOM-02-N4 | 80-240 mA active | 500 mA+ rail capability required | Espressif recommends external supply can deliver at least 0.5 A |
| 3V3 | SHT40 | ~0.4-2.2 µA avg | 0.5 mA measurement; heater up to 100 mA if enabled | Firmware should leave heater off unless needed |
| 3V3 | Status LED | 0-2 mA intended | ~1 mA with R14=1 kΩ | Firmware-controlled, not always on |
| 3V3 | Pull-ups/feedback/leakage | <1 mA | <2 mA | I2C, boot, reset, PG/FLT pullups |
| 3V3 total | ~100-250 mA active | Design target 600 mA; regulator rated 1 A | Buck chosen for thermal margin vs LDO |
Input current estimate at 5 V with 90% buck efficiency:
- 600 mA at 3.3 V = 1.98 W output → ~2.2 W input → ~440 mA from 5 V.
- 1 A at 3.3 V = 3.3 W output → ~3.7 W input → ~730 mA from 5 V.
Protection Settings
- eFuse U1 current limit: R3 = 2.49 kΩ. TPS2595 equation
ILIMIT = 2000 / RILM - 0.04gives ~0.763 A. - eFuse UVLO: R4 = 1 MΩ top, R5 = 387 kΩ bottom. TPS2595 example sets ~4.3 V rising UVLO.
- eFuse inrush control: C3 = 3.3 nF on dVdt.
- eFuse caps: C1 = 100 nF input transient cap, C2 = 1 µF output cap.
- VBUS ESD: D2 ESD5341N, pin 1 to
VBUS_RAW, pin 2 to GND. - USB data ESD: D1 USBLC6-2P6, I/O1 pair on D+, I/O2 pair on D−, VBUS to
VBUS_RAW, GND to GND.
3.3 V Buck Regulator
- U2 TPS62821DLCR, 1 A adjustable buck.
- L1 = 0.47 µH Murata DFE252012P-R47M=P2; Isat 5.7 A, temperature-rise current 4.0 A.
- C4 = 4.7 µF input, C5/C6 = 2 × 10 µF output.
- FB reference = 0.6 V. R6 = 450 kΩ top, R7 = 100 kΩ bottom gives 3.3 V.
- C7 = 120 pF feed-forward cap across R6.
- PG pulled up with R8 = 100 kΩ and routed to ESP32 GPIO5 (
BUCK_PGOOD).
ESP32-C3 Pin Map
Table
| Function | Net | ESP32-C3 pin |
|---|---|---|
| USB D− | USB_DN | GPIO18 / IO18 |
| USB D+ | USB_DP | GPIO19 / IO19 |
| I2C SDA | I2C_SDA | GPIO0 / IO0 |
| I2C SCL | I2C_SCL | GPIO1 / IO1 |
| Status LED | LED_STATUS_GPIO | GPIO3 / IO3 |
| eFuse fault | EFUSE_FLT | GPIO4 / IO4 |
| Buck power-good | BUCK_PGOOD | GPIO5 / IO5 |
| BOOT | ESP_BOOT | GPIO9 / IO9, 10 kΩ pull-up and button to GND |
| GPIO2 strap | ESP_GPIO2_STRAP | GPIO2 / IO2, 10 kΩ pull-up |
| UART TX recovery | UART_TX | TXD / GPIO21 |
| UART RX recovery | UART_RX | RXD / GPIO20 |
Unused exposed GPIOs IO6, IO7, IO8, and IO10 are marked no-connect.
USB-C Current Strategy
This design intentionally remains below the need for PD negotiation. Passive Rd resistors permit default USB-C 5 V sink operation. The eFuse current limit is set around 0.76 A, which covers expected ESP32 radio bursts while avoiding a default 3 A assumption. If the product must draw above default USB current in a future revision, add CC current-detection or a USB-C sink controller.
Open Engineering Items
- Assign production MPNs for the generic resistors, capacitors, and test pads before manufacturing export.
- PCB layout must enforce ESP32-C3 antenna keepout at the board edge.
- PCB layout must keep the SHT40 away from the buck, ESP32, USB connector, LED, and thermal copper.
- USB D+/D− should be routed as a short, matched USB FS differential pair with ESD close to J1.
Architecture Summary
Power Budget
Protection Settings
3.3 V Buck Regulator
ESP32-C3 Pin Map
USB-C Current Strategy
Open Engineering Items
