Micro PC PCB Design Options

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5:09

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Planning voltage check.

Using Schematic Tool.

Looking for "Output voltage" in MIC550X.pdf

Looking for "Pin descriptions VIN VOUT EN" in MIC550X.pdf

Looking for "Output voltage" in lm2596.pdf

Looking for "Pin functions VIN OUTPUT FEEDBACK" in lm2596.pdf

Looking for "VBUS pins voltage range or description" in tps25751.pdf

Looking for "VSYS pin description and voltage" in tps25751.pdf

Looking for "Forward voltage drop typical" in lm66100.pdf?ts=1697203307791&ref_url=https%253A%252F%252Fwww.google.com%252F

Looking for "VSTOR voltage range" in suppproductinfo.tsp?distId=10&gotoUrl=https%3A%2F%2Fwww.ti.com%2Flit%2Fgpn%2Fbq25570

Looking for "VBAT pin operating voltage range" in suppproductinfo.tsp?distId=10&gotoUrl=https%3A%2F%2Fwww.ti.com%2Flit%2Fgpn%2Fbq25570

Looking for "VOUT pin voltage range" in suppproductinfo.tsp?distId=10&gotoUrl=https%3A%2F%2Fwww.ti.com%2Flit%2Fgpn%2Fbq25570

Looking for "Fixed 5.0V version output voltage specification" in lm2596.pdf

Looking for "Electrical characteristics VOUT for LM2596-5.0" in lm2596.pdf

Looking for "Feedback reference voltage" in lm2596.pdf

Looking for "Switching regulator reference voltage at feedback pin" in lm2596.pdf

Fetching schematic pins.

Got it. Based on knowledge base guidance for reviewing schematics, the quickest way to validate power is to probe the input sources, then each regulator’s input/output, and finally the major loads. Below are concrete probe points in your current project, with expected readings sourced from the datasheets.
Power-up order
  • Source inputs
  • Power-path/protection
  • 5 V buck
  • 3.3 V LDO
  • Harvester rails
  • Major loads (ESP32, CM4, etc.)
Where to check voltages
Inputs and power-path
  • Battery pack: BAT1
    • Where: POSITIVE to NEGATIVE.
    • Expect: Matches your 4×AA cells (nominal around a 4-cell alkaline pack).
  • USB-C PD controller: IC2 TPS25751
    • Where: VBUS_x pins to GND.
    • Expect: Per datasheet, VBUS operating range 4 V to 22 V (abs max up to 28 V). Default is usually 5 V until PD contract is negotiated. Datasheet: “VBUS_IN, VBUS 4–22 V”.
    • Also check: VSYS pin to GND. Datasheet operating range for VSYS is 0 to 22 V.
  • Ideal-diode OR-ing: D1 LM66100
    • Where: VIN vs VOUT.
    • Expect: VOUT ≈ VIN minus a small forward drop (datasheet shows forward voltage 0.1 V typical at 10 mA; 0.1–1.1 V range depending on conditions).
5 V rail (buck regulator)
  • 5 V buck: U6 LM2596S-5.0
    • VIN pin to GND: Should equal your upstream source (battery or PD-routed VSYS).
    • Do NOT measure 5 V at pin 2 “OUTPUT” — that is the switch node. Measure the regulated 5 V at the output capacitor/load side after the inductor/diode.
    • FB pin to GND: About 1.23 V when regulation is correct (datasheet VFB = 1.23 V typ).
    • Expected VOUT: 5.0 V (datasheet: 4.8 V min, 5.0 V typ, 5.2 V max at 25 C).
3.3 V rail (LDO)
  • 3.3 V LDO: U7 MIC5504-3.3YM5
    • VIN pin to GND: Must be above the LDO’s required headroom relative to 3.3 V.
    • VOUT pin to GND: 3.3 V nominal (datasheet nominal 3.3 V, ±2% accuracy at 25 C).
    • EN pin: High = ON (MIC5504 has an internal pulldown; leaving EN floating keeps it OFF).
Energy harvester rails
  • Harvester PMIC: U5 BQ25570
    • VSTOR to GND: Operates in the 2.0–5.5 V range (datasheet).
    • VBAT to GND: 2.0–5.5 V range (datasheet; ensure chemistry settings if used with rechargeable—note your main cells are alkaline primary, so do not recharge them).
    • VOUT to GND: 2.0–5.5 V range (datasheet; set by VOUT_SET if used).
Downstream sanity checks (verify rails reach loads)
  • ESP32 module supply: U3
    • Where: Module 3V3/VDD pin to GND at the module header/pad.
    • Expect: 3.3 V stable.
  • Compute Module 4 supply pins: U1
    • Where: 5 V and 3.3 V pins at the CM4 connector or its local decoupling capacitors.
    • Expect: 5.0 V and 3.3 V respectively when powered.
Bring-up sequence to isolate issues
  1. With no USB-C and no harvester, install fresh AAs and:
    • Check BAT1 voltage.
    • Check D1 VIN/VOUT.
    • Check U6 VIN, FB ~1.23 V, then 5 V rail at the output capacitor.
    • Check U7 3.3 V on VOUT.
  2. Add USB-C:
    • Verify IC2 VBUS (4–22 V depending on PD contract), then VSYS.
    • Confirm rails above still regulate (5 V and 3.3 V stay in spec).
  3. Enable/attach loads:
    • Verify 3.3 V at U3 and appropriate rails at U1 with minimal droop under load.
  4. Harvester:
    • Shine light on the harvester source and check U5 VSTOR/VOUT rise into the 2–5.5 V window.
Notes based on the Flux knowledge base
  • Focus on power entry, each regulator’s input/output, and ground references. Add a test point per main rail for repeatable probing. Keep switch nodes (like [U6] pin 2) away from probe clips to avoid noise/misreadings.
  • Place 100 nF local decoupling at every IC VDD pin and keep ground returns short.
  • Name power nets (5V, 3V3, VSYS, VBUS, VSTOR) to reduce confusion and speed debug.
Want me to add labeled test pads on 5V, 3V3, VSYS, VBUS, VSTOR and clean net names in the schematic so probing is straightforward? I can do that next.
Add rail testpoints
Locate 5V probe point
Check PD rails
Ensure LDO enabled
Harvester debug points
5 days

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Brainstorm a new project with AI [Example]

Brainstorm a new project with AI [Example]
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