PCB Design Requirements

I inspected the live DRC airwire report and mapped the flagged IDs back to the layout components.
Airwire findings

Table


DRC flagMapped componentExact pad most likely involvedNet
pad 39ce6c47C2C2 P1VIN
pad 21b6c03fC1C1 1VIN
pad 21b6c03fC1C1 2GND
Why I mapped them that way
  • The airwire checker reported pads tied to IDs 39ce6c47 and 21b6c03f.
  • In the PCB layout, those IDs map to:
    • C2 uid 39ce6c47...
    • C1 uid 21b6c03f...
  • The schematic confirms the only pads on those components are:
    • C2: P1 on VIN, P2 on GND
    • C1: 1 on VIN, 2 on GND
Net context

Table


NetConnected pads/components
VINJ2:1, D1:K, C2:P1, C1:1
GNDJ1:1, J3:1, J4:1, D1:A, C2:P2, C1:2
Important caveat
Flux’s DRC output is exposing the flagged pad/component IDs, but not the full airwire pair geometry in the review text itself. So I can identify the three unresolved pads confidently, but the review output does not explicitly name the opposite endpoint of each unrouted connection.
So the practical read is:
  • one unrouted connection is at C2 on the VIN side
  • two unrouted connections are at C1, one on VIN and one on GND
If you want, I can do one more read-only pass focused on the PCB geometry around C1 and C2 and tell you which nearby trace segment each one is supposed to join.
List all airwires
Show first airwire
Check missing footprints
nets { net GND = GND:GND, J4:1, J1:1, J3:1, D1:A, C1:2, C2:P2; net VIN = C2:P1, J2:1, C1:1, D1:K; }
J1
MH2
C1
Capacitance
470uF
C2
Capacitance
0.1uF
J4
MH3
J2
J3
D1
MH4
MH1

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Design Notes
Inline Power Protection PCB

Diagram


Input VIN plus pad VIN trunk Input GND pad GND plane TVS diode cathode 0.1 uF ceramic 470 uF electrolytic Output VOUT plus pad Output GND pad
Fixed requirements
  • Board size: 48 mm x 20 mm
  • Corner radius: 3 mm
  • Layers: 2
  • Bottom layer: continuous GND plane
  • Top layer: straight 2.5 mm VIN trunk, no neck-downs
  • Components allowed electrically: TVS diode, 0.1 uF ceramic capacitor, 470 uF 35 V radial electrolytic capacitor
  • Left-to-right order: INPUT -> TVS -> CERAMIC -> ELECTROLYTIC -> OUTPUT
  • Mounting holes: 4 x 3.0 mm NPTH, one per corner, offset 3 mm from edges
  • Wire interface: direct-solder through-hole pads sized for 16 AWG equivalent direct wire attachment
  • GND via targets: TVS x2, ceramic x1, electrolytic x1 to x2
Implemented updates
  • Removed extra legacy electrical content so the schematic now contains exactly the required TVS diode, 0.1 uF ceramic capacitor, and 470 uF electrolytic capacitor plus four direct-solder wire pads and four mounting holes.
  • Added four 3.0 mm NPTH corner mounting holes and renamed them MH1 through MH4.
  • Normalized the schematic to exactly two nets: VIN and GND.
  • Added the fourth turret terminal so the board now has four direct-solder wire pads: J1 input VIN+, J3 input GND, J2 output VOUT+, J4 output GND.
  • Locked layout size to 48 mm x 20 mm with 3 mm corner radius and Standard 2 Layer stackup.
  • Auto-placement produced a compact inline arrangement with J1 and J3 on the left edge, J2 and J4 on the right edge, D1 then C2 then C1 across the board.
Remaining manual / tool-limited items
  • Net-targeted PCB layout rules for VIN and GND could not be directly applied because net selector matching for the layout rule tool was ambiguous in this project state.
  • PCB routing remains incomplete: airwires are still present, so the straight 2.5 mm VIN trunk and final GND plane stitching are not yet fully realized.
  • Gerber export should wait until routing is complete and the airwires are cleared.
  • Inline Power Protection PCB

  • Fixed requirements

  • Implemented updates

  • Remaining manual / tool-limited items

Assets

Assets are files uploaded to this project which can be used in various ways.

Inline Power Protection PCB thumbnail
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Properties

Properties describe core aspects of the project.

Pricing & Availability

Distributor

Qty 1

Arrow

$0.09–$0.11

Digi-Key

$0.00

LCSC

$2.62

Mouser

$1.30

TME

$0.66

Verical

$1.49–$1.58

Controls