Project Start


The two-sided placement, 3D preview, and full reroute are complete and clean. One electrical limitation remains: both SETUP buttons are correctly paralleled, but GPIO14 is not exposed on the selected socketed DevKit headers, so the SETUP net cannot reach the ESP32 without a physical bodge/test-point wire or a different DevKit carrier.
Revised both sides and updated the 3D placement:
  • Front: centered landscape TFT, joystick with MID on the left, horizontally aligned A/B on the right, and two centered SETUP buttons above/below the display.
  • Rear: centered USB-accessible DevKit, mirrored MAX98357A modules and audio passives, symmetric speakers, and preserved JST speaker polarity.
  • Board remains 180 × 100 mm, 4 layers. Routing and DRC are clean: 0 airwires, 0 dangling traces, overlaps, bounds, or keepout violations.
Open item
  • The two SETUP buttons are paralleled to GND on BTN_SETUP_GPIO14, but the socketed ESP32-C6 DevKit does not expose GPIO14 on its headers. The SETUP net therefore cannot reach the MCU through the existing sockets.
Next steps
  1. Add a documented bodge/test-point connection from the DevKit’s GPIO14 pad to the PCB.
  2. Alternatively assign SETUP to an exposed GPIO, such as GPIO15.
  3. Use another ESP32-C6 carrier that exposes GPIO14.
Expose GPIO14 safely
Use GPIO15 setup
Select alternate carrier
Prepare manufacturing review

PRG32 PCB

PRG32 PCB thumbnail