I can’t directly clear ERC in your project, but I can give you a complete, datasheet-aligned connection checklist so everything is wired correctly and ERC will pass once MPNs are assigned and the EC800M-CN symbol is added.
Follow these connections and notes exactly
Power and VBAT rail
- Regulator: Configure U2 TPS62130 to 3.8 V (Vout = 0.8 V × (1 + R1/R2)). Typical pair: R1=37.5 kΩ, R2=10 kΩ.
- VBAT feed to modem: Tie both Modem_Conn VBAT_42 and VBAT_43 portals to U2’s 3.8 V output and to the VBAT bulk/decoupling cluster: C13, C14 (bulk), plus C15 1 µF and C4 100 nF to GND.
- VBAT debug link: Insert R6 = 0 Ω in series near the modem pins (or as a shunt link) for current probing. Keep VBAT copper ≥ 2 mm width.
- VDD_EXT (1.8 V ref, pin 24): Connect Modem_Conn VDD_EXT_24 to U3 TXS0108E VCCA. Connect U3 VCCB to U1 3V3.
- Ground: Tie all Modem_Conn GND portals to GND. Ensure solid plane under the module area.
Level shifting (all modem I/O is 1.8 V)
- Use U3 TXS0108E.
- A-side (1.8 V, VCCA=VDD_EXT_24): connect to these Modem_Conn portals:
- PWRKEY_7, RESET_N_15, NET_STATUS_16, STATUS_25
- MAIN_RXD_17, MAIN_TXD_18, MAIN_DTR_19, MAIN_RI_20, MAIN_DCD_21, MAIN_CTS_22, MAIN_RTS_23
- B-side (3.3 V, VCCB=3V3): route to U1 through the stacking headers J4/J5. Use UART0 TXD0/RXD0 for MAIN_RXD/MAIN_TXD and assign RTS/CTS/DTR/RI/DCD/STATUS/PWRKEY/RESET to non-bootstrapping GPIOs. Keep PWRKEY and RESET_N total load < 10 nF. Add labeled test pads where helpful.
SIM interface (USIM1)
- Series links: Route Modem_Conn USIM1_DATA_11, USIM1_RST_12, USIM1_CLK_13, USIM1_VDD_14, USIM1_DET_79 via 0 Ω series resistors R7–R11 to the nano‑SIM J1 pins (I/O, RST, CLK, VCC, DET).
- ESD: Protect the five SIM nets with D4 (COM to GND).
- Pull-ups: Place 15 kΩ near J1 (use R12, R13, R14) on SIM_IO/SIM_CLK/SIM_RST per the EC800M-CN reference.
- Shunt caps: Place 33 pF C0G to ground on SIM_IO/CLK/RST: C16, C17, C18.
- Decoupling: Add 100 nF from SIM_VDD to GND at J1 (you can repurpose C18 or add a dedicated 100 nF close to J1 VCC).
- Presence: Add 51 kΩ R15 for SIM_DET per your connector’s detect scheme. Keep traces short and guarded with ground.
RF and antenna
- From Modem_Conn ANT_MAIN_35 feed the π‑match Cpi1–Lpi–Cpi2. Default C’s can be DNP; tune at bring‑up. Keep the network tight to the feed.
- To chip antenna: route from the π‑match output to ANT1 with 50 Ω, stitched ground fences, and top‑layer keepout under the antenna body.
- U.FL option: keep a 0 Ω branch R1 from the feed to J3 Center_Contact so you can select external antenna. Do not populate both paths simultaneously.
- Antenna ESD: If used, keep C19 DNP or choose a device with Cj ≤ 0.05 pF right at the feed.
USB (optional, from modem)
- Differential lines: Route Modem_Conn USB_DP_59 and USB_DM_60 through the common‑mode choke L2, then 0 Ω jumpers R16/R17, to the USB‑C J6 D+ and D− pins. Maintain 90 Ω differential.
- ESD: Protect D+/D− with D5; COM to GND. Choose TVS Cj < 1 pF per line.
- VBUS detect: Tie Modem_Conn USB_VBUS_61 to 5 V through J6:VBUS and a link (0 Ω for bring‑up). COM ground stitching close to the connector.
Stacking headers and ESP32 mapping
- Use J4/J5 to mate with U1. Bring up:
- 5 V to U2 input, GND, 3V3 to U3 VCCB, UART0 TXD0/RXD0, RTS/CTS, DTR/RI/DCD, NET_STATUS/STATUS, PWRKEY, RESET_N.
- Keep all ESP32 bootstrap pins safe (no hard pulls that alter boot mode). Use series resistors or ensure default-high/low per ESP32 guidance.
To actually clear ERC now
- I can assign the missing MPNs and set Exclude-from-BOM where needed (test pads, stacking sockets) if you want me to make those edits in your project. Say “Assign MPNs now” and I’ll proceed to update properties and re-run ERC.
- Otherwise, once you confirm all the connections above are in place, re-run ERC. The only remaining items should be MPNs or any leftover unconnected Modem_Conn portals.
If you prefer, I can also provide a compact pin-to-pin checklist (one line per signal) for quick verification against your Modem_Conn portals.