Linear Issues Review


Done. I focused the local reroute-prep rules on the hotspot cluster using the direct layout/review workflow: inspect with real-time project tools first, then apply targeted layout-rule changes rather than broad guesses
Updated local rules

Table


AreaChange
J2keep out / min keep out -> 0.15 mm, local trace width -> 0.15 mm, local via size -> 0.45 mm, via hole -> 0.20 mm
U5keep out / min keep out -> 0.15 mm, local trace width -> 0.20 mm, local via size -> 0.45 mm, via hole -> 0.20 mm
KEY1keep out / min keep out -> 0.15 mm, local trace width -> 0.15 mm
KEY2keep out / min keep out -> 0.15 mm, local trace width -> 0.15 mm
KEY3keep out / min keep out -> 0.15 mm, local trace width -> 0.15 mm
KEY4keep out / min keep out -> 0.15 mm, local trace width -> 0.15 mm
KEY5keep out / min keep out -> 0.15 mm, local trace width -> 0.15 mm
Left unchanged Current review state
The hotspot prep is in place, but the board is still blocked mainly by existing unrouted/conflicting copper:
  • 96 airwires
  • 9 overlapping copper
  • 0 floating copper in the latest check
What this means
  • J2 now has friendlier local escape-routing rules for the 0.5 mm FFC area.
  • U5 keeps a slightly wider local trace rule than the buttons.
  • The button cluster KEY1 to KEY5 is now loosened consistently for future rerouting.
If you want, I can next:
  • review the exact nets around J2 and U5 that should get priority first
  • or tighten the backlight-related area around U5 separately from the button signals
Review priority nets
Separate U5 backlight
Check overlap hotspots
  • Set J2's minKeepOut to "0.15mm"
  • Set J2's keepOut to "0.15mm"
  • Set J2's traceWidth to "0.15mm"
  • Set J2's size to "0.45mm"
  • Set J2's holeSize to "0.20mm"
  • Set U5's minKeepOut to "0.15mm"
  • Set U5's keepOut to "0.15mm"
  • Set U5's traceWidth to "0.20mm"
  • Set U5's size to "0.45mm"
  • Set U5's holeSize to "0.20mm"
  • Set KEY1's minKeepOut to "0.15mm"
  • Set KEY1's keepOut to "0.15mm"
  • Set KEY1's traceWidth to "0.15mm"
  • Set KEY5's minKeepOut to "0.15mm"
  • Set KEY5's keepOut to "0.15mm"
  • Set KEY5's traceWidth to "0.15mm"
  • Set KEY3's minKeepOut to "0.15mm"
  • Set KEY3's keepOut to "0.15mm"
  • Set KEY3's traceWidth to "0.15mm"
  • Set KEY4's minKeepOut to "0.15mm"
  • Set KEY4's keepOut to "0.15mm"
  • Set KEY4's traceWidth to "0.15mm"
  • Set KEY2's minKeepOut to "0.15mm"
  • Set KEY2's keepOut to "0.15mm"
  • Set KEY2's traceWidth to "0.15mm"

J4
R2
Resistance
5.1kΩ
C15
Capacitance
10uF
C1
Capacitance
100nF
C9
Capacitance
100nF
C29
Capacitance
100nF
C27
Capacitance
100pF
C3
Capacitance
100nF
C11
Capacitance
10uF
R6
Resistance
4.7kΩ
R13
Resistance
196kΩ
C21
Capacitance
2.2uF
C13
Capacitance
10uF
R12
Resistance
100kΩ
R7
Resistance
0.22 Ω
R16
Resistance
10kΩ
C26
Capacitance
4.7uF
R8
Resistance
100 Ω
C30
Capacitance
10uF
R5
Resistance
4.7kΩ
C18
Capacitance
1uF
R11
Resistance
470 Ω
C22
Capacitance
10uF
C16
Capacitance
10uF
R4
Resistance
10kΩ
C17
Capacitance
1uF
C28
Capacitance
220pF
C5
Capacitance
100nF
C8
Capacitance
100nF
C12
Capacitance
10uF
C6
Capacitance
100nF
C2
Capacitance
100nF
C24
Capacitance
2.2uF
R14
Resistance
10kΩ
R15
Resistance
10kΩ
C4
Capacitance
100nF
C7
Capacitance
100nF
C14
Capacitance
10uF
R1
Resistance
5.1kΩ
R10
Resistance
330 Ω
C20
Capacitance
100nF
C25
Capacitance
4.7uF
C23
Capacitance
10uF
C19
Capacitance
22nF
R3
Resistance
10kΩ
R9
Resistance
100 Ω
C10
Capacitance
100nF
U4
J3
D3
D2
L2
Inductance
22uH
D1
L1
Inductance
2.2uH
U3
U1
J1
U2
KEY5
U5
KEY1
KEY3
KEY4
J2
KEY2
Project Specification
Design Summary
Status: Approved
Manufacturing target: Prototype
Software / firmware: ESP-IDF based firmware for ESP32-S3 display, touch, storage, and audio bring-up

Scope
Purpose
This board is an ESP32-S3 development platform standardized around an ILI9341 TFT in portrait orientation by default, while preserving USB programming, touch, microSD storage, audio output, and expansion I/O. This revision freezes the layout-driving requirements for the next design pass, including control-button assignments, user-facing placement zones, and board-resizing intent.
In scope
  • USB-C 5 V input, 3.3 V buck conversion, and backlight power stage
  • ESP32-S3 module core power, boot, programming, and debug support
  • Touch connector wiring, I2C pull-ups, and touch interrupt/reset signals
  • microSD SPI wiring and audio DAC support circuitry
  • ILI9341 portrait display selection rule unless a larger superior option is backed by a datasheet
  • Explicit assignment of the five existing tact switches as BOOT, RESET, and three user buttons
  • Board resizing and component placement constraints for a user-facing edge layout
Out of scope
  • Final large-panel connector remapping if a non-ILI9341 display is later chosen
  • Panel-specific power sequencing and any module-only control signals not yet documented by a future alternate display vendor

System context
The board serves as a development and integration platform for an ESP32-S3 based HMI system with a portrait TFT display, capacitive touch, removable storage, optional audio output, and developer-facing physical controls.

Requirements
Functional
  • The board shall accept USB-C 5 V power as a sink device.
  • The board shall generate a 3.3 V rail for the ESP32-S3 and digital peripherals.
  • The board shall support USB-UART programming and console access.
  • The board shall support an external capacitive touch interface over I2C.
  • The board shall support a microSD card in SPI mode.
  • The board shall expose audio output from the PCM5102A DAC.
  • The board shall default to an ILI9341 TFT used in portrait orientation unless a superior larger display option is provided with its datasheet.
  • The board shall provide BOOT, RESET, and three user buttons using the five existing tact switches.
  • The board shall assign the existing tact switches as KEY1 = BOOT, KEY2 = RESET, KEY3 = USER1, KEY4 = USER2, and KEY5 = USER3.
  • The board shall place all user-facing controls and display-related connectors along the user-facing edge in the next layout pass.
Electrical
  • Input power: USB-C 5 V sink.
  • Key rails: 5 V input, 3.3 V logic rail, LCD backlight boost output.
  • Critical interfaces: USB 2.0, UART0 programming, I2C touch, SPI microSD, I2S audio, SPI TFT display, backlight power, and expansion GPIO.
  • The 3.3 V rail shall be generated by the AP63203 buck regulator with a datasheet-backed feedback and bootstrap network.
  • The PCM5102A shall be wired in hardware-controlled I2S mode using datasheet-backed strap and support capacitor connections.
  • The BOOT function shall pull GPIO0 low only when pressed and otherwise leave normal boot behavior intact.
  • The RESET function shall pull EN low only when pressed while preserving the existing pull-up and auto-reset path.
Mechanical / environmental
  • The layout shall be resized from the current oversized low-density board to a portrait-oriented outline better matched to the component envelope while retaining routing margin.
  • The original aggregate component envelope of approximately 85.13 mm x 116.48 mm shall be treated as the minimum occupied area for resizing decisions.
  • Final connector orientation must be validated against the exact display and touch module documentation before fabrication.

Key constraints
  • Default to ILI9341 portrait display support unless an alternate larger display is justified by a datasheet.
  • Do not guess unresolved alternate-display pin assignments.
  • Keep the ESP32-S3 antenna area clear in the future layout.
  • Use the existing tact switches rather than adding extra button hardware unless a later mechanical revision requires it.
  • Maintain a clear separation between completed subsystems and display-pinout-dependent wiring.
  • Align UI elements, including the display connector area, touch connector, and BOOT/RESET/USER buttons, along the user-facing edge in the layout.

Dependencies and risks
Dependencies
  • Exact ILI9341 module pin mapping for the chosen connector implementation, or a superior alternate-display datasheet if the display choice changes
  • Confirmation of touch-panel cable orientation and pin numbering
Key risks
  • Incorrect display connector mapping if fabricated before the selected display module pinout is obtained
  • Remaining boot/reset handshake cleanup and backlight compensation cleanup could affect bring-up if left unresolved
  • Poor usability if UI parts are not kept on the user-facing edge during placement

Validation
Success criteria
  • All retained and new board features are documented in the requirements.
  • The display selection rule and button assignments are explicitly defined.
  • PCB resizing intent and user-facing placement zones are documented for the next layout pass.
  • Required external information for finalizing the display connector is listed clearly.
Planned checks
  • ERC review for floating and power-related pins
  • Datasheet cross-check of power and audio support networks
  • Placement review after the board is resized and UI zones are applied

Release-facing notes
Expected deliverables
  • Updated schematic and preserved button-control plan
  • Design notes documenting assumptions, blockers, and placement zones
  • Approved specification with display rule, button assignments, and layout-driving constraints called out
Special release notes
  • Do not release for fabrication until the selected display connector pinout is confirmed.
  • Treat the current touch connector mapping as provisional until the final module documentation is available.
  • Treat the current board size as provisional until the logical placement pass completes.

Change notes / open questions
Changes in this revision
  • Standardized the design intent around an ILI9341 portrait default path.
  • Assigned the five existing tact switches to BOOT, RESET, and three user buttons.
  • Added placement-zone and board-resizing requirements for the next physical design pass.
Open questions
  • What is the exact ILI9341 module or alternate-display part number that will be used?
  • What is the complete selected display connector pin mapping, including power, SPI or alternate interface signals, and backlight pins?
  • Does the final touch implementation use the current separate 6-pin touch FFC assumption?
  • Design Summary

  • Scope

  • System context

  • Requirements

  • Functional

  • Electrical

  • Mechanical / environmental

  • Key constraints

  • Dependencies and risks

  • Validation

  • Release-facing notes

  • Change notes / open questions