The USB2514B hub support network is connected, including all VDD33/VDDA33 bypass capacitors, CRFILT/PLLFILT, reset RC, RBIAS, and crystal load capacitors. Four USBLC6-2SC6 arrays are inserted in series between the hub downstream D+/D− pairs and the four camera USB connectors; each array has its GND and switched-VBUS reference connected.

TPS2054D OUT1..OUT4 feed camera LF, LL, RF, and RL respectively. Each switched VBUS rail includes its dedicated 120 µF bulk capacitor and the corresponding USBLC6 VBUS pin. Hub PRTPWR and over-current links remain paired per port; TPS2054D inputs and grounds are connected.

The left MAX17048 is connected to the Raspberry Pi Zero 2 W physical I2C master on MON_I2C_SDA/MON_I2C_SCL. The right MAX17048 was removed because no physical right-side I2C master exists. Camera UART pairs terminate at MODULE_UART_DEBUG rather than orphan single-pin nets.

Incomplete integrated candidates U_REG_L/R, U_MUX_L/R, U_CHG_L/R, and U_AMP_L/R were removed. Their interfaces are now explicit 2.54 mm module headers:

Power headers use duplicated current-carrying VIN/VOUT/GND pins where appropriate, plus explicit enable/status signals. Audio headers expose 5 V, GND, I2S BCLK/LRCLK/DOUT, differential speaker output, and enable.

Typical system load remains 6.5 W; peak envelope 14.2 W. At Vin=3.0 V: 2.55 A total typical at 85% efficiency and 5.92 A peak-envelope at 80%. The gateway/left 1S-to-5V module must guarantee at least 2 A continuous and 3 A transient at Vin=3.0 V. The opposite/right module must guarantee at least 1.2 A continuous and 2 A transient at Vin=3.0 V. Thermal performance, current limit, UVLO behavior, connector current rating, and transient response must be verified from the selected commercial module documentation.

Two 800 mAh cells provide 5.92 Wh nominal, 4.7–5.0 Wh usable, giving 43–46 minutes at 6.5 W. A 120 mAh buffer is ~0.44 Wh and gives only 3–4 minutes ideal. The 100–150 mAh buffer requires its own protected 1S pack and charger plus isolated feeds; cells must not be directly paralleled.

The commercial boost, buffer/power-path, charger, and audio modules are placeholders and must be selected, documented, and bench-validated before any integrated PCB implementation or layout commitment. Required pin mapping, logic polarity, voltage compatibility, protection behavior, current rating, thermal limits, dimensions, and mounting geometry must be reconciled against the final module datasheets. Until that selection is complete, these headers define a coherent prototype interface only and are not approval for integrating equivalent IC circuits onto the PCB.

Latest ERC pass reports no open ERROR/WARNING checks in the Electrical Rule Checks category. Connector-facing enable/status, speaker, I2S, and UART nets are intentional module interfaces.

The single Flux layout is configured as a 250 x 56 mm rectangular prototype panel with 2 mm corner radius. The size was derived from the measured 5,399 mm² footprint area: 38.6% raw fill and 51.6% routing-aware fill with 1 mm component-side clearance. A 50 mm panel height proved too tight at the USB edge, so the preliminary mechanical width was increased to 56 mm. This is deliberately not a Ray-Ban-thin geometry: the Raspberry Pi Zero 2 W footprint is approximately 68 x 31 mm and sets the gateway-temple thickness/width envelope.

The panel is divided along X into three physical regions:

Flux currently uses one continuous rectangular board outline rather than two disconnected islands. Fabrication must therefore add a separable panel treatment at the LEFT/TAB and TAB/RIGHT boundaries (V-score or routed slots with mouse-bites), with final tab geometry and tooling reviewed by the chosen fab. No routing was started in this phase.

All 52 footprinted components were placed. Modules and connectors remain on Top; only small passives use Bottom where needed. The 24 MHz hub crystal is constrained within 5 mm, hub decoupling is clustered around its power pins, USB pad-access corridors are reserved, and the removable-battery/FPC/USB connectors are kept accessible. XIAO ESP32S3 Sense placement preserves access to the external antenna/U.FL side rather than assuming a PCB-antenna overhang.

Post-placement checks report no component-body overlap, no component outside the board, no critical proximity failure, and no stackup-validation or pad-access error. Airwire errors are expected because this phase intentionally excludes routing. The density/congestion estimator still marks the hub/load-switch/host-USB cluster and the long cross-panel I2S nets as difficult or unrouteable; this is a preliminary placement blocker for the routing phase and may require a wider panel, local repartitioning, or a revised inter-temple/audio interconnect before routing.

Targeted post-placement correction spread the USB2514B hub, gateway USB-host connector, TPS2054D, crystal/support network, and switched-VBUS bulk capacitors within the existing left-temple region. The panel remains 250 x 56 mm; no routing was added. Component-body, board-boundary, pad-access, density, and invalid-layer checks return no findings for the requested categories. The congestion estimator still marks the hub-to-TPS2054 enable/over-current bundle as unrouteable despite two genuine spacing passes, and separately flags the J_USB/D_USB_ESD/audio-edge area. These require a routing-architecture or regional-placement decision before routing rather than further blind movement.

The board was rewritten using both the Standard 4 Layer template with explicit copper-layer overrides and an explicit custom four-copper-layer definition named 4-Layer Signal-GND-Power-Signal. Flux stackup read-back still converts both internal layers to Signal, and the layout summary inconsistently reports only two copper layers. Therefore the requested Top Signal / Inner1 Ground Plane / Inner2 Power Plane / Bottom Signal assignment is not confirmed in persisted read-back and remains a Flux stackup-tool blocker. Do not route or release fabrication data until the layer-type metadata can be made to persist and is re-read correctly.

Mechanical blockers still requiring resolution: final commercial boost/charger/audio module dimensions and mounting, battery and speaker envelope, skin-side clearance/thermal insulation around the Pi and TPS2054D, XIAO antenna/U.FL cable bend radius and keepout, camera/FPC bend and strain relief, hinge/front-frame datum, and fab-specific V-score/mouse-bite rules.