Chat

Welcome to Flux

Treat Flux like your intern. Tell it what you'd like to build and it'll get to work. You can also ask it questions, brainstorm ideas, and teach it your preferences. Learn More

Explain project
Write a project description
Find schematic issues
Create a test plan
Simulate a circuit
Prepare for Manufacturing
Component Selection Workflow
New Subsystem Wizard
U_TEMP1
U_ADC1
U_ADC2
R17
Resistance
10kΩ
R27
Resistance
15kΩ
R32
Resistance
15kΩ
R20
Resistance
10kΩ
R18
Resistance
10kΩ
R16
Resistance
10kΩ
R46
Resistance
6.8kΩ
R35
Resistance
15kΩ
R34
Resistance
15kΩ
R1
Resistance
1kΩ
R4
Resistance
1kΩ
R5
Resistance
1kΩ
R43
Resistance
6.8kΩ
R40
Resistance
6.8kΩ
R8
Resistance
1kΩ
R6
Resistance
1kΩ
R37
Resistance
6.8kΩ
R_DIV_L1
Resistance
6.8kΩ
R30
Resistance
15kΩ
R12
Resistance
1kΩ
R_PU1
Resistance
4.7kΩ
R_I2C1
Resistance
4.7kΩ
R22
Resistance
10kΩ
R45
Resistance
6.8kΩ
R39
Resistance
6.8kΩ
R29
Resistance
15kΩ
R19
Resistance
10kΩ
R9
Resistance
1kΩ
R31
Resistance
15kΩ
R_BUZZ_BASE
Resistance
1kΩ
R3
Resistance
1kΩ
R33
Resistance
15kΩ
R24
Resistance
10kΩ
R42
Resistance
6.8kΩ
R25
Resistance
10kΩ
R13
Resistance
1kΩ
R47
Resistance
6.8kΩ
R_PD1
Resistance
10kΩ
R48
Resistance
220 Ω
R_LED1
Resistance
220 Ω
R_BASE1
Resistance
1kΩ
R_DIV_H1
Resistance
15kΩ
R28
Resistance
15kΩ
R36
Resistance
15kΩ
R21
Resistance
10kΩ
R2
Resistance
1kΩ
R44
Resistance
6.8kΩ
R15
Resistance
10kΩ
R7
Resistance
1kΩ
R38
Resistance
6.8kΩ
R41
Resistance
6.8kΩ
R23
Resistance
10kΩ
R26
Resistance
15kΩ
R10
Resistance
1kΩ
R14
Resistance
4.7kΩ
R11
Resistance
1kΩ
LED_RED1
Q13
Q9
Q5
J_BUZZ1
Q2
J_PROX1
J_BTN1
K9
K12
K10
LED_AMBER1
Q10
K8
Q11
K11
K2
Q1
K6
Q4
Q12
Q14
K4
Q6
K1
K3
K7
Q8
Q3
K5
Q7
D10
D2
D3
D6
D5
D14
U_DAC2
D12
D11
U_LDC1
D8
D1
D7
D4
D9
U_DAC3
D13
U_DAC1
U_OPT1
CORE-P3
CORE-P4A
CM4
CORE-P4B
J_SAFETY
U_WD1

Refine this doc
Ask about this doc
PCB Routing Setup Status
Design Rule Exceptions / Schematic Signoff
Created schematic signoff note documenting the 10 accepted relay NC ERC exceptions. These pins are normally-closed relay contacts used for joystick pass-through, not no-connect pins.
Routing Setup Actions
  • Pre-routing board check was run.
  • Default routing width was reduced to 0.10 mm with 0.08 mm minimum to make fine-pitch CM4 and DAC pins routeable.
  • Pre-routing check improved from 18 warnings to 1 remaining LDC1614 footprint/padstack warning.
  • Full auto-route was started after routing setup; it completed and applied 1125 routing nodes.
Routing Result
  • Auto-route completed successfully.
  • Post-route review still reports 17 remaining airwire items.
  • The 10 relay NC ERC exceptions remain visible as ERC errors in the platform review, but are accepted by project signoff and must not block layout.
Important Note on Priority Routing
The available full-board auto-router does not expose a strict staged priority interface for I2C first, then 24V safety, then relay drivers. A targeted I2C route attempt was tried first, but the deterministic pathfinder reported no path for the first I2C segment. The full auto-router was then used after preflight setup.
Remaining Work
  1. The previous 17 post-route airwires were reduced by replacing the ADS1115 module footprints with verified bare ADS1115IDGST VSSOP-10 ICs and rerouting affected nets.
  2. The final 2 GND airwires were resolved by configuring the GND plane/fill behavior and rerunning routing.
  3. Layer 2 / Mid-Layer 1 GND fill is present and assigned to the GND net with stitching density set to 10 mm x 10 mm.
  4. Layer 3 / Mid-Layer 2 3V3_LOGIC fill is present and assigned to the 3.3V logic/power net.
  5. Latest DRC no longer reports airwire, dangling-trace, overlapping-copper, or floating-copper errors. The only remaining review items are the already-signed-off relay NC normally-closed contact ERC exceptions.
Latest Final DRC Update
  • Airwires: clear after stitching CM4 GND to the GND plane and rerouting.
  • Dangling traces: clear.
  • Overlapping copper: clear.
  • Floating copper: clear.
  • Layer 2 / Mid-Layer 1: GND fill present and assigned to the GND net; stitching density set to 10 mm x 10 mm.
  • Layer 3 / Mid-Layer 2: 3V3_LOGIC fill present and assigned to the 3.3V logic/power net.
  • Remaining ERC items: 10 accepted relay NC exceptions for K1-K8, K11, and K12 joystick pass-through contacts.
  • Remaining manufacturing-readiness items: generic resistors and CORE-P3 still need manufacturer part numbers before an assembly-ready BOM is clean.
Manufacturing Export Readiness
Fabrication geometry is layout-clean for airwires, dangling traces, overlapping copper, and floating copper. Assembly/manufacturing review is not fully clean yet because many generic resistors and the CORE-P3 substitute connector do not have manufacturer part numbers assigned. Gerber export can be prepared for PCB fabrication, but BOM / pick-and-place should be treated as draft until those MPNs are finalized.
  • Design Rule Exceptions / Schematic Signoff

  • Routing Setup Actions

  • Routing Result

  • Important Note on Priority Routing

  • Remaining Work

  • Latest Final DRC Update

  • Manufacturing Export Readiness

CORE BrainBox Rev D 6b9f thumbnail
AutoPilot V4.0 C.O.R.E. Brain Box Rev D for Vermeer D20x22 HDD, with isolated CM4, relay, and 24V safety domains, I2C DAC/ADC control, relay driver cells, and Deutsch harness connectors.

Properties

Properties describe core aspects of the project.

Pricing & Availability

Distributor

Qty 1

Arrow

$25.83–$38.09

Digi-Key

$19.80

HQonline

$0.97–$1.36

LCSC

$24.51–$24.77

Mouser

$34.34

TME

$0.92

Verical

$31.04–$42.41

Controls