C5 Capacitor Overview

flux

4:16

Clarifying component details.

Asking for clarification on pinouts.

Confirming component scope.

Retrieving pinouts for components.

Analyzing the schematic.

Accessing knowledge base.

Planning pinout retrieval.

I compiled the project pin-to-net mapping for the key components and all 32 MOSFET channels. This reflects the actual schematic connectivity (best practice: ensure every harness pin and channel is fully mapped before layout/fab).
ESP32-S3 module
  • U1 ESP32-S3-WROOM-1-N16R8 | Pin | Net | |---|---| | 3V3 | 3V3 | | GND_1..GND_11 | GND | | EN, IOx, UARTx | (no explicit nets in current schematic unless shown elsewhere) |
3.3 V regulator
  • IC1 TPS62162QDSGRQ1 | Pin | Net | |---|---| | VIN | PACKP | | EN | SW1_EN | | VOS | 3V3 | | PGND, AGND, EP | GND | | SW, FB, PG | (no explicit nets shown in current page) |
I/O expanders
  • U2 MCP23017-E/SO (A-rail gates) | Pin | Net | |---|---| | VDD | 3V3 | | VSS | GND | | GPA0..GPA7 | GPA0, GPA1, GPA2, GPA3, GPA4, GPA5, GPA6, GPA7 | | GPB0..GPB7 | GPB0, GPB1, GPB2, GPB3, GPB4, GPB5, GPB6, GPB7 | | INTA, INTB, A0..A2, RESET, SI/SO/SCK/CS | (present; nets not shown here) |
  • U3 MCP23017-E/SO (B-rail gates) | Pin | Net | |---|---| | VDD | 3V3 | | VSS | GND | | GPA0..GPA7 | GPA0_2, GPA1_2, GPA2_2, GPA3_2, GPA4_2, GPA5_2, GPA6_2, GPA7_2 | | GPB0..GPB7 | GPB0_2, GPB1_2, GPB2_2, GPB3_2, GPB4_2, GPB5_2, GPB6_2, GPB7_2 |
6 V bucks (A and B rails)
  • U5 TPS54821RHLR (Rail A) | Pin | Net | |---|---| | PH_11, PH_12 | 6V_A_IN | | PVIN_4, PVIN_5 | PACKP | | GND_2, GND_3, EXP* | GND | | EN, VSENSE, COMP, SS/TR, PWRGD, BOOT, VIN, RT/CLK | (not shown here) |
  • U6 TPS54821RHLR (Rail B) | Pin | Net | |---|---| | PH_11, PH_12 | 6V_B_IN | | PVIN_4, PVIN_5 | PACKP | | GND_2, GND_3, EXP* | GND | | EN, VSENSE, COMP, SS/TR, PWRGD, BOOT, VIN, RT/CLK | (not shown here) |
eFuses (protected power path)
  • U7 TPS259824ONRGER (A rail) | Pin | Net | |---|---| | IN_1, IN_2 | 6V_A_IN | | OUT_1 | Net 1 | | GND_* | GND | | EN/UVLO, ILIM, DVDT, PG, etc. | (not shown here) |
  • U8 TPS259824ONRGER (B rail) | Pin | Net | |---|---| | IN_1, IN_2 | 6V_B_IN | | OUT_1 | GND (note: currently tied to GND in schematic; likely unintended) | | GND_* | GND | | EN/UVLO, ILIM, DVDT, PG, etc. | (not shown here) |
Charger and protector
  • U10 BQ24618RGET | Pin | Net | |---|---| | STAT1 | STAT1 | | VCC | VDD1 | | GND, EP | GND | | Others | (not shown here) |
  • U11 BQ29209DRBT | Pin | Net | |---|---| | VC1 | CELL_MID | | GND (VSS) | GND | | VC2, VDD, OUT, CB_EN, CD, VC1_CB, EP | (not shown here) |
Switches
  • SW1 R1966ABLKBLKEF | Pin | Net | |---|---| | 1 | SW1_EN (to IC1 EN) | | 2 | GND |
  • SW2 PB400EEQR1BLK (DPST ground interlock) | Pin | Net | |---|---| | 1 | GND (pole A out) | | 2 | J2_GND_RET (pole A in) | | 3 | GND (pole B out) | | 4 | J3_GND_RET (pole B in) |
Headers
  • J1 PJ-011A Barrel Jack | Pin | Net | |---|---| | 1 | VDD1 | | 2 | VDD1 | | 3 | (not shown) |
  • J2 2×10 header (A channels) | Pin | Net | Pin | Net | |---|---|---|---| | 1 | FIRE_A1 | 11 | FIRE_A9 | | 2 | FIRE_A2 | 12 | FIRE_A10 | | 3 | FIRE_A3 | 13 | FIRE_A11 | | 4 | FIRE_A4 | 14 | FIRE_A12 | | 5 | J2_GND_RET | 15 | J2_GND_RET | | 6 | FIRE_A5 | 16 | FIRE_A13 | | 7 | FIRE_A6 | 17 | FIRE_A14 | | 8 | FIRE_A7 | 18 | FIRE_A15 | | 9 | FIRE_A8 | 19 | FIRE_A16 | | 10 | J2_GND_RET | 20 | J2_GND_RET |
  • J3 2×10 header (B channels) | Pin | Net | Pin | Net | |---|---|---|---| | 1 | FIRE_B1 | 11 | FIRE_B9 | | 2 | FIRE_B2 | 12 | FIRE_B10 | | 3 | FIRE_B3 | 13 | FIRE_B11 | | 4 | FIRE_B4 | 14 | FIRE_B12 | | 5 | J3_GND_RET | 15 | J3_GND_RET | | 6 | FIRE_B5 | 16 | FIRE_B13 | | 7 | FIRE_B6 | 17 | FIRE_B14 | | 8 | FIRE_B7 | 18 | FIRE_B15 | | 9 | FIRE_B8 | 19 | FIRE_B16 | | 10 | J3_GND_RET | 20 | J3_GND_RET |
MOSFET channels (low-side)
  • Package and mapping are uniform: G=pin1, D=pin2, S=pin3 (per part properties). Sources are on GND; drains go to header pins; gates are on MCP23017 nets.

Table

MOSFETGate netDrain netSource net
Q1GPB0FIRE_A1GND
Q2GPB1FIRE_A2GND
Q3GPB2FIRE_A3GND
Q4GPB3FIRE_A4GND
Q5GPB4FIRE_A5GND
Q6GPB5FIRE_A6GND
Q7GPB6FIRE_A7GND
Q8GPB7FIRE_A8GND
Q9GPA0FIRE_A9GND
Q10GPA1FIRE_A10GND
Q11GPA2FIRE_A11GND
Q12GPA3FIRE_A12GND
Q13GPA4FIRE_A13GND
Q14GPA5FIRE_A14GND
Q15GPA6FIRE_A15GND
Q16GPA7FIRE_A16GND
Q17GPB0_2FIRE_B1GND
Q18GPB1_2FIRE_B2GND
Q19GPB2_2FIRE_B3GND
Q20GPB3_2FIRE_B4GND
Q21GPB4_2FIRE_B5GND
Q22GPB5_2FIRE_B6GND
Q23GPB6_2FIRE_B7GND
Q24GPB7_2FIRE_B8GND
Q25GPA0_2FIRE_B9GND
Q26GPA1_2FIRE_B10GND
Q27GPA2_2FIRE_B11GND
Q28GPA3_2FIRE_B12GND
Q29GPA4_2FIRE_B13GND
Q30GPA5_2FIRE_B14GND
Q31GPA6_2FIRE_B15GND
Q32GPA7_2FIRE_B16GND
Barrel jack and rail/power overview
  • J1 pins 1–2 are VDD1 (to U10:VCC).
  • Rails: PACKP feeds both bucks U5/U6; eFuse inputs are 6V_A_IN and 6V_B_IN. SW2 interlocks J2/J3 returns to GND.
Notes and one anomaly to review
  • U8:OUT_1 currently appears on GND in the schematic netlist. That would short the B rail output to ground, which is almost certainly unintended. Do you want me to correct that connection to the intended “6V_B_SWITCHED” net?
Would you like me to:
  • Add datasheet-backed functional pin descriptions for the major ICs (ESP32 module, MCP23017, TPS54821, TPS259824, TPS62162, BQ24618, BQ29209)?
  • Expand pin-to-net tables for remaining parts (connectors, passives not typically listed)?
Export as CSV table
Fix U8 OUT net
Add functional descriptions
Verify header mapping
54 days
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Dominant Plum Speeder Bike

Dominant Plum Speeder Bike thumbnail
3.3V ESP32-S3 Dual 6V Rail MOSFET Board with MCP23017 I2C Expanders, Option C Gate Network, SW2 DPST Rail-Interlock, 2S LiFePO4 Charger/BMS (BQ24618 + BQ29209) with Series Battery Wiring and Charge Integration, and 2×10 RA Headers (#MCP23017_3V3 #OptionC #GateNetwork #RailInterlock #Dual6V #BQ24618 #BQ29209 #2S #LiFePO4 #SeriesBattery #ChargeIntegration #RAHeaders)

Properties

Dual 6 V MOSFET-switched rails (2×16 channels)

6

V

WiFi

Dual TPS259824 eFuses with inrush control and protected power path

solderpad.org/licenses/SHL-2.1/

Arduino

Power Management

flowchart TD subgraph ChargerBMS["2S LiFePO4 Charger and Protection"] BQ24618["BQ24618RGET Charger IC"] -->|STAT| LED["Charge LED Indicator"] LED -->|Resistor| R_LED["Current-limiting resistor"] BQ24618 -->|BAT| PACKP["PACK+ net"] PACKP --> PowerRails BQ29209["BQ29209DRBT 2S Protector/Balancer"] BQ29209 -->|VC1| CELLMID["CELL_MID net"] BQ29209 -->|VC2| PACKP BQ29209 -->|VSS| GND end J1["12V Barrel Jack VIN"] -->|VIN| BQ24618 BAT1["Battery Cell 1"] -->|P| CELLMID BAT2["Battery Cell 2"] -->|N| CELLMID BAT1 -->|N| GND BAT2 -->|P| PACKP subgraph PowerRails["Power Distribution"] PVIN3V3["IC1 PVIN (3.3V Buck)"] --> IC1["TPS62162 3.3V Buck"] --> LogicRail["3.3V Logic Rail"] PACKP -->|PVIN| U5["TPS54821 #1 @6V Buck"] --> EFuseA["TPS259824 eFuse #1"] --> SW2["SW2 DPST Interlock"] --> HeadersA PACKP -->|PVIN| U6["TPS54821 #2 @6V Buck"] --> EFuseB["TPS259824 eFuse #2"] --> SW2 --> HeadersB LogicRail --> U1["ESP32-S3 @3.3V"] --> U2["MCP23017 Expanders @3.3V"] --> GateNetwork --> MOSFETs end

Consumer Electronics

ti.com/product/TPS54821

10

Battery

ESP32-S3

12 V ≥3 A barrel jack

On-board LiFePO4 pack with charger/BMS and bulk capacitance

2× MCP23017 I/O expanders

Switches

LiFePO4 2S

Pricing & Availability

Distributor

Qty 1

Arrow

$76.58–$85.62

Digi-Key

$33.38–$868.41

LCSC

$48.10

Mouser

$54.33–$926.63

TME

$5.86

Verical

$234.11–$262.64

Controls