Connector Design Options

Done — the ESP32 doodle was moved lower and kept together logically using the shared “ESP32 Doodle …” naming prefix.
Open items:
  • Mounting holes remain isolated as requested.
  • No new DRC issues; only expected floating mounting-hole warnings remain.
Suggested next step: visually confirm the new doodle position looks right before export.
deleted doodle, try this instead
ChatGPT Image Jul 1, 2026, 09_55_15 PM.png

Image

Added a simplified BayFinder silkscreen design inspired by your image:
  • BAYFINDER main text
  • Small tagline
  • ESP32-S3 label
  • Simple outline frame
  • Circuit-line accents on both sides
No new DRC issues were introduced. The only remaining warnings are the expected isolated M3 mounting holes.
Check, document, export
Run manufacturing check
Update project docs
Prepare export files
Check logo clearance
JS2B Pin_4 - JH2B Pin_4
JS2A Pin_1 - JH2A Pin_1
JS2B Pin_10 - JH2B Pin_10
JS1B Pin_4 - JH1B Pin_4
JS2B Pin_1 - JH2B Pin_1
JS1B Pin_3 - JH1B Pin_3
JS2A Pin_11 - JH2A Pin_11
JS2B Pin_7 - JH2B Pin_7
JS1B Pin_7 - JH1B Pin_7
JS1A Pin_1 - JH1A Pin_1
JS1B Pin_5 - JH1B Pin_5
JS1B Pin_6 - JH1B Pin_6
JS1B Pin_5 - JH1B Pin_5
JS2B Pin_8 - JH2B Pin_8
JS1A Pin_6 - JH1A Pin_6
JS1A Pin_4 - JH1A Pin_4
JS2B Pin_5 - JH2B Pin_5
JS2B Pin_3 - JH2B Pin_3
JS2A Pin_2 - JH2A Pin_2
JS2B Pin_2 - JH2B Pin_2
JS2A Pin_9 - JH2A Pin_9
JS1A Pin_3 - JH1A Pin_3
JS1A Pin_7 - JH1A Pin_7
JS2B Pin_9 - JH2B Pin_9
JS1B Pin_2 - JH1B Pin_2
JS1B Pin_11 - JH1B Pin_11
JS2A Pin_2 - JH2A Pin_2
JS2A Pin_7 - JH2A Pin_7
JS1A Pin_3 - JH1A Pin_3
JS1B Pin_8 - JH1B Pin_8
JS2B Pin_10 - JH2B Pin_10
JS2B Pin_5 - JH2B Pin_5
JS1B Pin_2 - JH1B Pin_2
JS1A Pin_11 - JH1A Pin_11
JS2A Pin_3 - JH2A Pin_3
JS1B Pin_9 - JH1B Pin_9
JS2A Pin_8 - JH2A Pin_8
JS1A Pin_1 - JH1A Pin_1
JS2A Pin_3 - JH2A Pin_3
JS1A Pin_7 - JH1A Pin_7
JS2B Pin_11 - JH2B Pin_11
JS2B Pin_9 - JH2B Pin_9
JS2A Pin_6 - JH2A Pin_6
JS1A Pin_5 - JH1A Pin_5
JS2B Pin_2 - JH2B Pin_2
JS2A Pin_5 - JH2A Pin_5
JS2B Pin_6 - JH2B Pin_6
JS2A Pin_4 - JH2A Pin_4
JS2A Pin_6 - JH2A Pin_6
JS1A Pin_8 - JH1A Pin_8
JS1A Pin_5 - JH1A Pin_5
JS1B Pin_10 - JH1B Pin_10
JS2A Pin_9 - JH2A Pin_9
JS1A Pin_2 - JH1A Pin_2
JS2B Pin_11 - JH2B Pin_11
JS1A Pin_2 - JH1A Pin_2
JS1A Pin_10 - JH1A Pin_10
JS2B Pin_3 - JH2B Pin_3
JS1A Pin_8 - JH1A Pin_8
JS1B Pin_6 - JH1B Pin_6
JS1B Pin_1 - JH1B Pin_1
JS1A Pin_2 - JH1A Pin_2
JS1B Pin_8 - JH1B Pin_8
JS2A Pin_5 - JH2A Pin_5
JS1A Pin_6 - JH1A Pin_6
JS1B Pin_11 - JH1B Pin_11
JS2A Pin_8 - JH2A Pin_8
JS2A Pin_1 - JH2A Pin_1
JS2B Pin_6 - JH2B Pin_6
JS1A Pin_1 - JH1A Pin_1
JS2A Pin_4 - JH2A Pin_4
JS1B Pin_7 - JH1B Pin_7
JS1B Pin_4 - JH1B Pin_4
JS1A Pin_9 - JH1A Pin_9
JS1B Pin_10 - JH1B Pin_10
JS2B Pin_7 - JH2B Pin_7
JS1A Pin_11 - JH1A Pin_11
JS1B Pin_3 - JH1B Pin_3
JS2B Pin_4 - JH2B Pin_4
JS1B Pin_1 - JH1B Pin_1
JS2B Pin_1 - JH2B Pin_1
JS1B Pin_9 - JH1B Pin_9
JS2A Pin_10 - JH2A Pin_10
JS2A Pin_11 - JH2A Pin_11
JS1B Pin_10 - JH1B Pin_10
JS1A Pin_4 - JH1A Pin_4
JS1A Pin_10 - JH1A Pin_10
JS2A Pin_10 - JH2A Pin_10
JS1A Pin_9 - JH1A Pin_9
JS2B Pin_8 - JH2B Pin_8
JS2A Pin_1 - JH2A Pin_1
JS2A Pin_7 - JH2A Pin_7
TP3
J4A
MH1
J2B
MH3
J1A
J2A
J4B
TP4
TP1
MH2
J3A
MH4
J3B
TP2
J1B

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BF-SR-PCBv1 Project Specification
Purpose
Mechanical and signal relocation PCB for an Espressif ESP32-S3-DEVKITC-1-N32R16V development board. The PCB contains no active circuitry; it only relocates signals through copper traces.
Core Requirements
  • 2-layer PCB.
  • Mount one ESP32-S3-DEVKITC-1-N32R16V using two 1x22 female sockets.
  • Route every pin straight through 1:1 to two additional 1x22 male headers.
  • No pin remapping.
  • No resistors, capacitors, LEDs, voltage regulators, ICs, or other active/support circuitry.
  • Only copper traces between connectors and test points.
  • Four M3 mounting holes.
  • USB-C connector remains accessible.
  • No copper under USB connector.
  • Four grouped service test points:
    • TP1 = 5V
    • TP2 = 3.3V
    • TP3 = 3.3V
    • TP4 = GND
  • Compact layout while maintaining 2.54 mm connector spacing.
  • Black solder mask and white silkscreen.
  • Intended for industrial DIN enclosure mounting.
Required Silkscreen
  • BayFinder™
  • BF-SR-PCBv1
  • Signal Relocation PCB
  • Revision A
  • ESP32-S3-DEVKITC-1-N32R16V
  • No active circuitry.
Verification Criteria
  • All 44 devkit socket pins connect 1:1 to matching relocation header pins.
  • No active components or passives in BOM except connectors, sockets, test points, mounting holes.
  • Service test points connect to the required rails only.
  • Board has 2 layers, four M3 holes, USB keepout/copper exclusion, and readable silkscreen.
  • Purpose

  • Core Requirements

  • Required Silkscreen

  • Verification Criteria

Documents

  • BF-SR-PCBv1 Project Specification

Assets

No assets added.

BF-SR-PCBv1

BF-SR-PCBv1 thumbnail
BF-SR-PCBv1 signal relocation PCB for ESP32-S3-DEVKITC-1-N32R16V

Properties

Properties describe core aspects of the project.

Pricing & Availability

Distributor

Qty 1

Controls